forked from OSchip/llvm-project
[X86][AVX512] Drop some default NoItinerary arguments that aren't needed any more
llvm-svn: 319782
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6a954157dd
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@ -311,7 +311,7 @@ multiclass AVX512_maskable_scalar<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag Ins, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS,
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InstrItinClass itin = NoItinerary,
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InstrItinClass itin,
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bit IsCommutable = 0> :
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AVX512_maskable<O, F, _, Outs, Ins, OpcodeStr, AttSrcAsm, IntelSrcAsm,
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RHS, itin, IsCommutable, 0, X86selects>;
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@ -340,7 +340,7 @@ multiclass AVX512_maskable_3src<bits<8> O, Format F, X86VectorVTInfo _,
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multiclass AVX512_maskable_3src_scalar<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag NonTiedIns, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, InstrItinClass itin = NoItinerary,
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dag RHS, InstrItinClass itin,
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bit IsCommutable = 0,
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bit IsKCommutable = 0,
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bit MaskOnly = 0> :
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@ -353,7 +353,7 @@ multiclass AVX512_maskable_in_asm<bits<8> O, Format F, X86VectorVTInfo _,
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string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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list<dag> Pattern,
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InstrItinClass itin = NoItinerary> :
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InstrItinClass itin> :
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AVX512_maskable_custom<O, F, Outs, Ins,
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!con((ins _.RC:$src0, _.KRCWM:$mask), Ins),
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!con((ins _.KRCWM:$mask), Ins),
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@ -370,7 +370,7 @@ multiclass AVX512_maskable_custom_cmp<bits<8> O, Format F,
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string AttSrcAsm, string IntelSrcAsm,
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list<dag> Pattern,
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list<dag> MaskingPattern,
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InstrItinClass itin = NoItinerary,
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InstrItinClass itin,
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bit IsCommutable = 0> {
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let isCommutable = IsCommutable in
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def NAME: AVX512<O, F, Outs, Ins,
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@ -390,7 +390,7 @@ multiclass AVX512_maskable_common_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, dag MaskingRHS,
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InstrItinClass itin = NoItinerary,
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InstrItinClass itin,
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bit IsCommutable = 0> :
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AVX512_maskable_custom_cmp<O, F, Outs, Ins, MaskingIns, OpcodeStr,
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AttSrcAsm, IntelSrcAsm,
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@ -400,7 +400,7 @@ multiclass AVX512_maskable_common_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag Ins, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, InstrItinClass itin = NoItinerary,
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dag RHS, InstrItinClass itin,
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bit IsCommutable = 0> :
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AVX512_maskable_common_cmp<O, F, _, Outs, Ins,
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!con((ins _.KRCWM:$mask), Ins),
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@ -410,7 +410,7 @@ multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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multiclass AVX512_maskable_cmp_alt<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag Ins, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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InstrItinClass itin = NoItinerary> :
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InstrItinClass itin> :
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AVX512_maskable_custom_cmp<O, F, Outs,
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Ins, !con((ins _.KRCWM:$mask),Ins), OpcodeStr,
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AttSrcAsm, IntelSrcAsm, [],[], itin>;
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@ -422,7 +422,7 @@ multiclass AVX512_maskable_logic<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag Ins, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, dag MaskedRHS,
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InstrItinClass itin = NoItinerary,
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InstrItinClass itin,
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bit IsCommutable = 0, SDNode Select = vselect> :
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AVX512_maskable_custom<O, F, Outs, Ins,
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!con((ins _.RC:$src0, _.KRCWM:$mask), Ins),
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@ -4770,7 +4770,8 @@ multiclass avx512_fp_scalar_sae<bits<8> opc, string OpcodeStr,X86VectorVTInfo _,
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(ins _.RC:$src1, _.RC:$src2), OpcodeStr,
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"{sae}, $src2, $src1", "$src1, $src2, {sae}",
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(SaeNode (_.VT _.RC:$src1), (_.VT _.RC:$src2),
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(i32 FROUND_NO_EXC))>, EVEX_B, Sched<[itins.Sched]>;
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(i32 FROUND_NO_EXC)), itins.rr>, EVEX_B,
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Sched<[itins.Sched]>;
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}
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}
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