forked from OSchip/llvm-project
[X86][SSE] Add vphaddd/vphsubd unpack(hop(),hop()) tests
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@ -58,6 +58,58 @@ define <4 x float> @test_unpackhi_hsub_v4f32(<4 x float> %0, <4 x float> %1, <4
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ret <4 x float> %7
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}
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define <4 x i32> @test_unpacklo_hadd_v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2, <4 x i32> %3) {
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; CHECK-LABEL: test_unpacklo_hadd_v4i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vphaddd %xmm0, %xmm2, %xmm1
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; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %0, <4 x i32> %1) #5
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%6 = tail call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %2, <4 x i32> %3) #5
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%7 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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ret <4 x i32> %7
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}
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define <4 x i32> @test_unpackhi_hadd_v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2, <4 x i32> %3) {
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; CHECK-LABEL: test_unpackhi_hadd_v4i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vphaddd %xmm3, %xmm0, %xmm1
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; CHECK-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %0, <4 x i32> %1) #5
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%6 = tail call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %2, <4 x i32> %3) #5
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%7 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
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ret <4 x i32> %7
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}
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define <4 x i32> @test_unpacklo_hsub_v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2, <4 x i32> %3) {
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; CHECK-LABEL: test_unpacklo_hsub_v4i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphsubd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vphsubd %xmm0, %xmm2, %xmm1
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; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %0, <4 x i32> %1) #5
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%6 = tail call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %2, <4 x i32> %3) #5
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%7 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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ret <4 x i32> %7
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}
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define <4 x i32> @test_unpackhi_hsub_v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2, <4 x i32> %3) {
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; CHECK-LABEL: test_unpackhi_hsub_v4i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vphsubd %xmm3, %xmm0, %xmm1
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; CHECK-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %0, <4 x i32> %1) #5
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%6 = tail call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %2, <4 x i32> %3) #5
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%7 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
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ret <4 x i32> %7
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}
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;
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; 256-bit Vectors
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;
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@ -114,6 +166,58 @@ define <8 x float> @test_unpackhi_hsub_v8f32(<8 x float> %0, <8 x float> %1, <8
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ret <8 x float> %7
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}
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define <8 x i32> @test_unpacklo_hadd_v8i32(<8 x i32> %0, <8 x i32> %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK-LABEL: test_unpacklo_hadd_v8i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphaddd %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vphaddd %ymm0, %ymm2, %ymm1
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; CHECK-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %0, <8 x i32> %1) #5
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%6 = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %2, <8 x i32> %3) #5
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%7 = shufflevector <8 x i32> %5, <8 x i32> %6, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13>
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ret <8 x i32> %7
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}
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define <8 x i32> @test_unpackhi_hadd_v8i32(<8 x i32> %0, <8 x i32> %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK-LABEL: test_unpackhi_hadd_v8i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: vphaddd %ymm3, %ymm0, %ymm1
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; CHECK-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %0, <8 x i32> %1) #5
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%6 = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %2, <8 x i32> %3) #5
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%7 = shufflevector <8 x i32> %5, <8 x i32> %6, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15>
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ret <8 x i32> %7
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}
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define <8 x i32> @test_unpacklo_hsub_v8i32(<8 x i32> %0, <8 x i32> %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK-LABEL: test_unpacklo_hsub_v8i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphsubd %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vphsubd %ymm0, %ymm2, %ymm1
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; CHECK-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %0, <8 x i32> %1) #5
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%6 = tail call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %2, <8 x i32> %3) #5
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%7 = shufflevector <8 x i32> %5, <8 x i32> %6, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13>
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ret <8 x i32> %7
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}
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define <8 x i32> @test_unpackhi_hsub_v8i32(<8 x i32> %0, <8 x i32> %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK-LABEL: test_unpackhi_hsub_v8i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vphsubd %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: vphsubd %ymm3, %ymm0, %ymm1
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; CHECK-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
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; CHECK-NEXT: ret{{[l|q]}}
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%5 = tail call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %0, <8 x i32> %1) #5
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%6 = tail call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %2, <8 x i32> %3) #5
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%7 = shufflevector <8 x i32> %5, <8 x i32> %6, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15>
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ret <8 x i32> %7
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}
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declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>)
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declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>)
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