forked from OSchip/llvm-project
isSplatMask() bug: first element can be an undef.
llvm-svn: 27847
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@ -1753,17 +1753,29 @@ static bool isSplatMask(SDNode *N) {
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// This is a splat operation if each element of the permute is the same, and
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// if the value doesn't reference the second vector.
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SDOperand Elt = N->getOperand(0);
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assert(isa<ConstantSDNode>(Elt) && "Invalid VECTOR_SHUFFLE mask!");
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for (unsigned i = 1, e = N->getNumOperands(); i != e; ++i) {
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unsigned NumElems = N->getNumOperands();
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SDOperand ElementBase;
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unsigned i = 0;
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for (; i != NumElems; ++i) {
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SDOperand Elt = N->getOperand(i);
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if (ConstantSDNode *EltV = dyn_cast<ConstantSDNode>(Elt)) {
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ElementBase = Elt;
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break;
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}
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}
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if (!ElementBase.Val)
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return false;
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for (; i != NumElems; ++i) {
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SDOperand Arg = N->getOperand(i);
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if (Arg.getOpcode() == ISD::UNDEF) continue;
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assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!");
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if (Arg != Elt) return false;
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if (Arg != ElementBase) return false;
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}
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// Make sure it is a splat of the first vector operand.
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return cast<ConstantSDNode>(Elt)->getValue() < N->getNumOperands();
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return cast<ConstantSDNode>(ElementBase)->getValue() < NumElems;
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}
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/// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies
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@ -1771,7 +1783,7 @@ static bool isSplatMask(SDNode *N) {
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bool X86::isSplatMask(SDNode *N) {
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assert(N->getOpcode() == ISD::BUILD_VECTOR);
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// We can only splat 64-bit, and 32-bit quantities.
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// We can only splat 64-bit, and 32-bit quantities with a single instruction.
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if (N->getNumOperands() != 4 && N->getNumOperands() != 2)
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return false;
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return ::isSplatMask(N);
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