forked from OSchip/llvm-project
[Hexagon] Remove default values from lambda parameters
llvm-svn: 329394
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ec79c00f20
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@ -10774,7 +10774,7 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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SmallVector<llvm::Value *, 4> Ops;
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Intrinsic::ID ID = Intrinsic::not_intrinsic;
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auto MakeCircLd = [&](unsigned IntID, bool HasImm = true) {
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auto MakeCircLd = [&](unsigned IntID, bool HasImm) {
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// The base pointer is passed by address, so it needs to be loaded.
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Address BP = EmitPointerWithAlignment(E->getArg(0));
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BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
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@ -10799,7 +10799,7 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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return Builder.CreateExtractValue(Result, 0);
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};
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auto MakeCircSt = [&](unsigned IntID, bool HasImm = true) {
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auto MakeCircSt = [&](unsigned IntID, bool HasImm) {
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// The base pointer is passed by address, so it needs to be loaded.
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Address BP = EmitPointerWithAlignment(E->getArg(0));
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BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
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@ -10907,49 +10907,49 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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return Builder.CreateExtractValue(Result, 0);
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}
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case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr:
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return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm=*/false);
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return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci:
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return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci);
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return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci:
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return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci);
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return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci:
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return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci);
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return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci:
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return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci);
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return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci:
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return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci);
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return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr:
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return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm=*/false);
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return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr:
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return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm=*/false);
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return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr:
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return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm=*/false);
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return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr:
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return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm=*/false);
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return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr:
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return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm=*/false);
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return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_brev_ldub:
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return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty);
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case Hexagon::BI__builtin_brev_ldb:
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