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[ValueTracking] Teach computeKnownBits that the result of an absolute value pattern that uses nsw flag is always positive. 

If the nsw flag is used in the absolute value then it is undefined for INT_MIN. For all other value it will produce a positive number. So we can assume the result is positive.

This breaks some InstCombine abs/nabs combining tests because we simplify the second compare from known bits rather than as the whole pattern. Looks like we can probably fix it by adding a neg+abs/nabs combine to just swap the select operands. Need to check alive to make sure there are no corner cases.

Differential Revision: https://reviews.llvm.org/D47041

llvm-svn: 333226
This commit is contained in:
Craig Topper 2018-05-24 21:22:51 +00:00
parent 6da6f433a0
commit 49f23fe349
3 changed files with 25 additions and 8 deletions
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6
llvm/lib/Analysis/ValueTracking.cpp
View File

@ -1078,6 +1078,12 @@ static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
// leading zero bits.
MaxHighZeros =
std::max(Known.countMinLeadingZeros(), Known2.countMinLeadingZeros());
} else if (SPF == SPF_ABS) {
// RHS from matchSelectPattern returns the negation part of abs pattern.
// If the negate has an NSW flag we can assume the sign bit of the result
// will be 0 because that makes abs(INT_MIN) undefined.
if (cast<Instruction>(RHS)->hasNoSignedWrap())
MaxHighZeros = 1;
}
// Only known if known in both the LHS and RHS.

11
llvm/test/Transforms/InstCombine/abs-1.ll
View File

@ -293,3 +293,14 @@ define <2 x i8> @negate_nabs(<2 x i8> %x) {
%r = sub <2 x i8> zeroinitializer, %s
ret <2 x i8> %r
}
define i1 @abs_must_be_positive(i32 %x) {
; CHECK-LABEL: @abs_must_be_positive(
; CHECK-NEXT: ret i1 true
;
%negx = sub nsw i32 0, %x
%c = icmp sge i32 %x, 0
%sel = select i1 %c, i32 %x, i32 %negx
%c2 = icmp sge i32 %sel, 0
ret i1 %c2
}

16
llvm/test/Transforms/InstCombine/abs_abs.ll
View File

@ -933,8 +933,8 @@ define i32 @nabs_abs_x09(i32 %x) {
; CHECK-LABEL: @nabs_abs_x09(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND1]]
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@ -949,8 +949,8 @@ define i32 @nabs_abs_x10(i32 %x) {
; CHECK-LABEL: @nabs_abs_x10(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND1]]
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@ -965,8 +965,8 @@ define i32 @nabs_abs_x11(i32 %x) {
; CHECK-LABEL: @nabs_abs_x11(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND1]]
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@ -981,8 +981,8 @@ define i32 @nabs_abs_x12(i32 %x) {
; CHECK-LABEL: @nabs_abs_x12(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND1]]
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x