forked from OSchip/llvm-project
[AMDGPU] Mark SMRD atomics
We did not have atomic flags on SMRD, did not copy TSFlags to real instructions, and did not have ret/noret atomic map. At the moment it is NFC, but needed for D96469. Differential Revision: https://reviews.llvm.org/D96823
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@ -62,6 +62,8 @@ class SM_Real <SM_Pseudo ps>
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let UseNamedOperandTable = ps.UseNamedOperandTable;
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let SMRD = ps.SMRD;
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let TSFlags = ps.TSFlags;
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bit is_buffer = ps.is_buffer;
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// encoding
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@ -227,24 +229,29 @@ class SM_Atomic_Pseudo <string opName,
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let ScalarStore = 1;
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let hasSideEffects = 1;
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let maybeAtomic = 1;
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let IsAtomicNoRet = !not(isRet);
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let IsAtomicRet = isRet;
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}
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class SM_Pseudo_Atomic<string opName,
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RegisterClass baseClass,
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RegisterClass dataClass,
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bit isImm,
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bit isRet> :
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bit isRet,
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string opNameWithSuffix = opName # !if(isImm,
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!if(isRet, "_IMM_RTN", "_IMM"),
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!if(isRet, "_SGPR_RTN", "_SGPR"))> :
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SM_Atomic_Pseudo<opName,
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!if(isRet, (outs dataClass:$sdst), (outs)),
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!if(isImm,
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(ins dataClass:$sdata, baseClass:$sbase, smem_offset:$offset, DLC:$dlc),
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(ins dataClass:$sdata, baseClass:$sbase, SReg_32:$offset, DLC:$dlc)),
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!if(isRet, " $sdst", " $sdata") # ", $sbase, $offset" # !if(isRet, " glc", "") # "$dlc",
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isRet> {
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isRet>,
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AtomicNoRet <opNameWithSuffix, isRet> {
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let offset_is_imm = isImm;
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let PseudoInstr = opName # !if(isImm,
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!if(isRet, "_IMM_RTN", "_IMM"),
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!if(isRet, "_SGPR_RTN", "_SGPR"));
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let PseudoInstr = opNameWithSuffix;
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let Constraints = !if(isRet, "$sdst = $sdata", "");
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let DisableEncoding = !if(isRet, "$sdata", "");
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@ -589,7 +596,8 @@ defm S_ATC_PROBE_BUFFER : SM_Real_Probe_vi <0x27, "S_ATC_PROBE_BUFFER">;
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//===----------------------------------------------------------------------===//
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class SMEM_Atomic_Real_vi <bits<8> op, SM_Atomic_Pseudo ps>
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: SMEM_Real_vi <op, ps> {
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: SMEM_Real_vi <op, ps>,
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AtomicNoRet <!subst("_RTN","",NAME), ps.glc> {
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bits<7> sdata;
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@ -973,7 +981,8 @@ defm S_ATC_PROBE : SM_Real_Probe_gfx10 <0x26, "S_ATC_PROBE">;
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defm S_ATC_PROBE_BUFFER : SM_Real_Probe_gfx10 <0x27, "S_ATC_PROBE_BUFFER">;
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class SMEM_Atomic_Real_gfx10 <bits<8> op, SM_Atomic_Pseudo ps>
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: SMEM_Real_gfx10 <op, ps> {
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: SMEM_Real_gfx10 <op, ps>,
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AtomicNoRet <!subst("_RTN","",NAME), ps.glc> {
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bits<7> sdata;
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bit dlc;
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