diff --git a/llvm/test/Transforms/InstCombine/apint-elim-logicalops.ll b/llvm/test/Transforms/InstCombine/apint-elim-logicalops.ll
deleted file mode 100644
index ec60e45d5491..000000000000
--- a/llvm/test/Transforms/InstCombine/apint-elim-logicalops.ll
+++ /dev/null
@@ -1,39 +0,0 @@
-; Test that elimination of logical operators works with 
-; arbitrary precision integers.
-; RUN: opt < %s -instcombine -S | \
-; RUN:    not grep {(and\|xor\|add\|shl\|shr)}
-; END.
-
-define i33 @test1(i33 %x) {
-        %tmp.1 = and i33 %x, 65535           ; <i33> [#uses=1]
-        %tmp.2 = xor i33 %tmp.1, -32768      ; <i33> [#uses=1]
-        %tmp.3 = add i33 %tmp.2, 32768       ; <i33> [#uses=1]
-        ret i33 %tmp.3
-}
-
-define i33 @test2(i33 %x) {
-        %tmp.1 = and i33 %x, 65535           ; <i33> [#uses=1]
-        %tmp.2 = xor i33 %tmp.1, 32768       ; <i33> [#uses=1]
-        %tmp.3 = add i33 %tmp.2, -32768      ; <i33> [#uses=1]
-        ret i33 %tmp.3
-}
-
-define i33 @test3(i16 %P) {
-        %tmp.1 = zext i16 %P to i33          ; <i33> [#uses=1]
-        %tmp.4 = xor i33 %tmp.1, 32768       ; <i33> [#uses=1]
-        %tmp.5 = add i33 %tmp.4, -32768      ; <i33> [#uses=1]
-        ret i33 %tmp.5
-}
-
-define i33 @test5(i33 %x) {
-	%tmp.1 = and i33 %x, 254
-	%tmp.2 = xor i33 %tmp.1, 128
-	%tmp.3 = add i33 %tmp.2, -128
-	ret i33 %tmp.3
-}
-
-define i33 @test6(i33 %x) {
-        %tmp.2 = shl i33 %x, 16           ; <i33> [#uses=1]
-        %tmp.4 = lshr i33 %tmp.2, 16      ; <i33> [#uses=1]
-        ret i33 %tmp.4
-}
diff --git a/llvm/test/Transforms/InstCombine/signext.ll b/llvm/test/Transforms/InstCombine/signext.ll
index 008662e04e9d..098dde109f8b 100644
--- a/llvm/test/Transforms/InstCombine/signext.ll
+++ b/llvm/test/Transforms/InstCombine/signext.ll
@@ -1,12 +1,16 @@
-; RUN: opt < %s -instcombine -S | \
-; RUN:    not grep {(and\|xor\|add\|shl\|shr)}
-; END.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
 
 define i32 @test1(i32 %x) {
         %tmp.1 = and i32 %x, 65535              ; <i32> [#uses=1]
         %tmp.2 = xor i32 %tmp.1, -32768         ; <i32> [#uses=1]
         %tmp.3 = add i32 %tmp.2, 32768          ; <i32> [#uses=1]
         ret i32 %tmp.3
+; CHECK: @test1
+; CHECK: %sext = trunc i32 %x to i16
+; CHECK: %tmp.3 = sext i16 %sext to i32
+; CHECK: ret i32 %tmp.3
 }
 
 define i32 @test2(i32 %x) {
@@ -14,6 +18,10 @@ define i32 @test2(i32 %x) {
         %tmp.2 = xor i32 %tmp.1, 32768          ; <i32> [#uses=1]
         %tmp.3 = add i32 %tmp.2, -32768         ; <i32> [#uses=1]
         ret i32 %tmp.3
+; CHECK: @test2
+; CHECK: %sext = trunc i32 %x to i16
+; CHECK: %tmp.3 = sext i16 %sext to i32
+; CHECK: ret i32 %tmp.3
 }
 
 define i32 @test3(i16 %P) {
@@ -21,6 +29,9 @@ define i32 @test3(i16 %P) {
         %tmp.4 = xor i32 %tmp.1, 32768          ; <i32> [#uses=1]
         %tmp.5 = add i32 %tmp.4, -32768         ; <i32> [#uses=1]
         ret i32 %tmp.5
+; CHECK: @test3
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
 }
 
 define i32 @test4(i16 %P) {
@@ -28,18 +39,29 @@ define i32 @test4(i16 %P) {
         %tmp.4 = xor i32 %tmp.1, 32768          ; <i32> [#uses=1]
         %tmp.5 = add i32 %tmp.4, -32768         ; <i32> [#uses=1]
         ret i32 %tmp.5
+; CHECK: @test4
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
 }
 
 define i32 @test5(i32 %x) {
-        %tmp.1 = and i32 %x, 254                ; <i32> [#uses=1]
+        %tmp.1 = and i32 %x, 255                ; <i32> [#uses=1]
         %tmp.2 = xor i32 %tmp.1, 128            ; <i32> [#uses=1]
         %tmp.3 = add i32 %tmp.2, -128           ; <i32> [#uses=1]
         ret i32 %tmp.3
+; CHECK: @test5
+; CHECK: %sext = trunc i32 %x to i8
+; CHECK: %tmp.3 = sext i8 %sext to i32
+; CHECK: ret i32 %tmp.3
 }
 
 define i32 @test6(i32 %x) {
         %tmp.2 = shl i32 %x, 16         ; <i32> [#uses=1]
         %tmp.4 = ashr i32 %tmp.2, 16            ; <i32> [#uses=1]
         ret i32 %tmp.4
+; CHECK: @test6
+; CHECK: %tmp.2 = shl i32 %x, 16
+; CHECK: %tmp.4 = ashr i32 %tmp.2, 16
+; CHECK: ret i32 %tmp.4
 }