AMDGPU/GlobalISel: Use live in helper function for returnaddress

This commit is contained in:
Matt Arsenault 2020-07-20 17:10:42 -04:00 committed by Matt Arsenault
parent 65b6dbf939
commit 486e84dfa4
1 changed files with 3 additions and 13 deletions

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@ -1094,8 +1094,6 @@ bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {
!RBI.constrainGenericRegister(DstReg, *RC, *MRI)) !RBI.constrainGenericRegister(DstReg, *RC, *MRI))
return false; return false;
MachineBasicBlock &EntryMBB = MF.front();
// Check for kernel and shader functions // Check for kernel and shader functions
if (Depth != 0 || if (Depth != 0 ||
MF.getInfo<SIMachineFunctionInfo>()->isEntryFunction()) { MF.getInfo<SIMachineFunctionInfo>()->isEntryFunction()) {
@ -1105,22 +1103,14 @@ bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {
return true; return true;
} }
Register ReturnAddrReg = TRI.getReturnAddressReg(MF);
MachineFrameInfo &MFI = MF.getFrameInfo(); MachineFrameInfo &MFI = MF.getFrameInfo();
// There is a call to @llvm.returnaddress in this function // There is a call to @llvm.returnaddress in this function
MFI.setReturnAddressIsTaken(true); MFI.setReturnAddressIsTaken(true);
// Get the return address reg and mark it as an implicit live-in // Get the return address reg and mark it as an implicit live-in
Register LiveIn = MRI->getLiveInVirtReg(ReturnAddrReg); Register ReturnAddrReg = TRI.getReturnAddressReg(MF);
if (!LiveIn) { Register LiveIn = getFunctionLiveInPhysReg(MF, TII, ReturnAddrReg,
LiveIn = MF.addLiveIn(ReturnAddrReg, RC); AMDGPU::SReg_64RegClass);
BuildMI(EntryMBB, EntryMBB.begin(), DL, TII.get(AMDGPU::COPY), LiveIn)
.addReg(ReturnAddrReg);
if (!EntryMBB.isLiveIn(ReturnAddrReg))
EntryMBB.addLiveIn(ReturnAddrReg);
}
BuildMI(*MBB, &I, DL, TII.get(AMDGPU::COPY), DstReg) BuildMI(*MBB, &I, DL, TII.get(AMDGPU::COPY), DstReg)
.addReg(LiveIn); .addReg(LiveIn);
I.eraseFromParent(); I.eraseFromParent();