WebAssembly: implement WebAssemblyTargetLowering::getTargetNodeName

Summary: Implementation is the same as in AArch64.

Subscribers: aemerson, jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11956

llvm-svn: 244655
This commit is contained in:
JF Bastien 2015-08-11 20:13:18 +00:00
parent f7b85e0ce2
commit 480c840896
2 changed files with 13 additions and 1 deletions

View File

@ -120,6 +120,16 @@ MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
return VT.getSimpleVT();
}
const char *
WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
case WebAssemblyISD::FIRST_NUMBER: break;
case WebAssemblyISD::RETURN: return "WebAssemblyISD::RETURN";
case WebAssemblyISD::ARGUMENT: return "WebAssemblyISD::ARGUMENT";
}
return nullptr;
}
//===----------------------------------------------------------------------===//
// WebAssembly Lowering private implementation.
//===----------------------------------------------------------------------===//

View File

@ -22,7 +22,7 @@ namespace llvm {
namespace WebAssemblyISD {
enum {
enum NodeType : unsigned {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
RETURN,
ARGUMENT,
@ -47,6 +47,8 @@ private:
MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
const char *getTargetNodeName(unsigned Opcode) const override;
bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,