From 480609d0f3bc392bf1fbf36b7f467a6e050e51e1 Mon Sep 17 00:00:00 2001
From: Tim Northover <tnorthover@apple.com>
Date: Mon, 30 Jan 2017 19:12:50 +0000
Subject: [PATCH] GlobalISel: permit unused vregs without a register-class
 after ISel.

This can happen if earlier combining has removed all uses of some VReg, which
is fine and shouldn't flag an error.

llvm-svn: 293537
---
 .../CodeGen/GlobalISel/InstructionSelect.cpp  | 14 +++++----
 .../AArch64/GlobalISel/no-regclass.mir        | 30 +++++++++++++++++++
 2 files changed, 39 insertions(+), 5 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/no-regclass.mir

diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 4c40387eed32..2bb987ff681c 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -141,15 +141,19 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
   for (auto &VRegToType : MRI.getVRegToType()) {
     unsigned VReg = VRegToType.first;
     auto *RC = MRI.getRegClassOrNull(VReg);
-    auto *MI = MRI.def_instr_begin(VReg) == MRI.def_instr_end()
-                   ? nullptr
-                   : &*MRI.def_instr_begin(VReg);
-    if (!RC) {
+    MachineInstr *MI = nullptr;
+    if (MRI.def_instr_begin(VReg) != MRI.def_instr_end())
+      MI = &*MRI.def_instr_begin(VReg);
+    else if (MRI.use_instr_begin(VReg) != MRI.use_instr_end())
+      MI = &*MRI.use_instr_begin(VReg);
+
+    if (MI && !RC) {
       if (TPC.isGlobalISelAbortEnabled())
         reportSelectionError(MF, MI, "VReg has no regclass after selection");
       Failed = true;
       break;
-    }
+    } else if (!RC)
+      continue;
 
     if (VRegToType.second.isValid() &&
         VRegToType.second.getSizeInBits() > (RC->getSize() * 8)) {
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/no-regclass.mir b/llvm/test/CodeGen/AArch64/GlobalISel/no-regclass.mir
new file mode 100644
index 000000000000..6832ce0ee8bd
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/no-regclass.mir
@@ -0,0 +1,30 @@
+# RUN: llc -O0 -mtriple=aarch64-apple-ios -global-isel -start-before=legalizer -stop-after=instruction-select %s -o - | FileCheck %s
+
+# We run the legalizer to combine the trivial EXTRACT_SEQ pair, leaving %1 and
+# %2 orphaned after instruction-selection (no instructions define or use
+# them). This shouldn't be a problem.
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+
+  define void @unused_reg() { ret void }
+
+---
+# CHECK-LABEL: name: unused_reg
+name:            unused_reg
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+# CHECK:      body:
+# CHECK:  %0 = COPY %w0
+# CHECK:  %w0 = COPY %0
+
+body:             |
+  bb.0:
+    liveins: %w0
+    %0:gpr(s32) = COPY %w0
+    %1:gpr(s32) = G_SEQUENCE %0(s32), 0
+    %2:gpr(s32) = G_EXTRACT %1(s32), 0
+    %w0 = COPY %2(s32)
+...