forked from OSchip/llvm-project
Misc accumulated tweaks to legalization logic for various targets.
llvm-svn: 73476
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e531f048f8
commit
48021d15d6
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@ -249,6 +249,25 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
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setOperationAction(ISD::MUL, MVT::i32, Legal);
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setOperationAction(ISD::MUL, MVT::i64, Legal);
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// Expand double-width multiplication
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// FIXME: It would probably be reasonable to support some of these operations
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setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand);
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setOperationAction(ISD::MULHU, MVT::i8, Expand);
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setOperationAction(ISD::MULHS, MVT::i8, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand);
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setOperationAction(ISD::MULHU, MVT::i16, Expand);
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setOperationAction(ISD::MULHS, MVT::i16, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::MULHU, MVT::i32, Expand);
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setOperationAction(ISD::MULHS, MVT::i32, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
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setOperationAction(ISD::MULHU, MVT::i64, Expand);
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setOperationAction(ISD::MULHS, MVT::i64, Expand);
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// Need to custom handle (some) common i8, i64 math ops
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setOperationAction(ISD::ADD, MVT::i8, Custom);
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setOperationAction(ISD::ADD, MVT::i64, Legal);
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@ -107,6 +107,10 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
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// VASTART needs to be custom lowered to use the VarArgsFrameIndex
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setOperationAction(ISD::VAARG , MVT::Other, Custom);
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setOperationAction(ISD::VASTART , MVT::Other, Custom);
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// FIXME: These should be legal
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setOperationAction(ISD::BIT_CONVERT, MVT::i64, Expand);
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setOperationAction(ISD::BIT_CONVERT, MVT::f64, Expand);
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// Use the default implementation.
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setOperationAction(ISD::VACOPY , MVT::Other, Expand);
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@ -95,6 +95,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
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setOperationAction(ISD::JumpTable, MVT::i32, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
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setOperationAction(ISD::SELECT, MVT::f32, Custom);
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setOperationAction(ISD::SELECT, MVT::f64, Custom);
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setOperationAction(ISD::SELECT, MVT::i32, Custom);
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setOperationAction(ISD::SETCC, MVT::f32, Custom);
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setOperationAction(ISD::SETCC, MVT::f64, Custom);
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@ -122,6 +123,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
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setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
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setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
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// We don't have line number support yet.
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setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
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@ -788,8 +788,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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setOperationAction(ISD::USUBO, MVT::i64, Custom);
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setOperationAction(ISD::SMULO, MVT::i32, Custom);
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setOperationAction(ISD::SMULO, MVT::i64, Custom);
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setOperationAction(ISD::UMULO, MVT::i32, Custom);
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setOperationAction(ISD::UMULO, MVT::i64, Custom);
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if (!Subtarget->is64Bit()) {
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// These libcalls are not available in 32-bit.
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