forked from OSchip/llvm-project
Make handling of conditional stuff much more straightforward
llvm-svn: 70767
This commit is contained in:
Anton Korobeynikov
parent
dedfa00ba1
commit
47fcd72e24
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@ -78,13 +78,15 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
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setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
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setOperationAction(ISD::BR_JT, MVT::Other, Expand);
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setOperationAction(ISD::BRIND, MVT::Other, Expand);
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setOperationAction(ISD::BR_CC, MVT::Other, Expand);
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setOperationAction(ISD::BRCOND, MVT::Other, Custom);
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setOperationAction(ISD::SETCC, MVT::i8, Custom);
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setOperationAction(ISD::SETCC, MVT::i16, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
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setOperationAction(ISD::SELECT, MVT::i8, Custom);
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setOperationAction(ISD::SELECT, MVT::i16, Custom);
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setOperationAction(ISD::BR_CC, MVT::i8, Custom);
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setOperationAction(ISD::BR_CC, MVT::i16, Custom);
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setOperationAction(ISD::BRCOND, MVT::Other, Expand);
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setOperationAction(ISD::SETCC, MVT::i8, Expand);
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setOperationAction(ISD::SETCC, MVT::i16, Expand);
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setOperationAction(ISD::SELECT, MVT::i8, Expand);
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setOperationAction(ISD::SELECT, MVT::i16, Expand);
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setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
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setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom);
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// FIXME: Implement efficiently multiplication by a constant
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@ -110,9 +112,8 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
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case ISD::CALL: return LowerCALL(Op, DAG);
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case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
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case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG);
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case ISD::SETCC: return LowerSETCC(Op, DAG);
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case ISD::BRCOND: return LowerBRCOND(Op, DAG);
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case ISD::SELECT: return LowerSELECT(Op, DAG);
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case ISD::BR_CC: return LowerBR_CC(Op, DAG);
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case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
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default:
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assert(0 && "unimplemented operand");
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@ -490,23 +491,14 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op,
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);;
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}
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MVT MSP430TargetLowering::getSetCCResultType(MVT VT) const {
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return MVT::i8;
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}
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SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) {
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assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer");
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SDValue LHS = Op.getOperand(0);
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SDValue RHS = Op.getOperand(1);
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DebugLoc dl = Op.getDebugLoc();
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ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
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static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, unsigned &TargetCC,
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ISD::CondCode CC,
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DebugLoc dl, SelectionDAG &DAG) {
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// FIXME: Handle bittests someday
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assert(!LHS.getValueType().isFloatingPoint() && "We don't handle FP yet");
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// FIXME: Handle jump negative someday
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unsigned TargetCC = 0;
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TargetCC = MSP430::COND_INVALID;
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switch (CC) {
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default: assert(0 && "Invalid integer condition!");
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case ISD::SETEQ:
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@ -537,66 +529,46 @@ SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) {
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break;
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}
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SDValue Cond = DAG.getNode(MSP430ISD::CMP, dl, MVT::i16, LHS, RHS);
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return DAG.getNode(MSP430ISD::SETCC, dl, MVT::i8,
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DAG.getConstant(TargetCC, MVT::i8), Cond);
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return DAG.getNode(MSP430ISD::CMP, dl, MVT::Flag, LHS, RHS);
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}
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SDValue MSP430TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) {
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SDValue MSP430TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
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SDValue Chain = Op.getOperand(0);
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SDValue Cond = Op.getOperand(1);
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SDValue Dest = Op.getOperand(2);
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DebugLoc dl = Op.getDebugLoc();
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SDValue CC;
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ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
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SDValue LHS = Op.getOperand(2);
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SDValue RHS = Op.getOperand(3);
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SDValue Dest = Op.getOperand(4);
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DebugLoc dl = Op.getDebugLoc();
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// Lower condition if not lowered yet
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if (Cond.getOpcode() == ISD::SETCC)
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Cond = LowerSETCC(Cond, DAG);
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unsigned TargetCC = MSP430::COND_INVALID;
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SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
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// If condition flag is set by a MSP430ISD::CMP, then use it as the condition
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// setting operand in place of the MSP430ISD::SETCC.
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if (Cond.getOpcode() == MSP430ISD::SETCC) {
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CC = Cond.getOperand(0);
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Cond = Cond.getOperand(1);
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} else
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assert(0 && "Unimplemented condition!");
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return DAG.getNode(MSP430ISD::BRCOND, dl, Op.getValueType(),
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Chain, Dest, CC, Cond);
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return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(),
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Chain,
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Dest, DAG.getConstant(TargetCC, MVT::i8),
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Flag);
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}
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SDValue MSP430TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) {
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SDValue Cond = Op.getOperand(0);
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SDValue TrueV = Op.getOperand(1);
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SDValue FalseV = Op.getOperand(2);
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SDValue MSP430TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
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SDValue LHS = Op.getOperand(0);
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SDValue RHS = Op.getOperand(1);
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SDValue TrueV = Op.getOperand(2);
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SDValue FalseV = Op.getOperand(3);
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ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
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DebugLoc dl = Op.getDebugLoc();
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SDValue CC;
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// Lower condition if not lowered yet
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if (Cond.getOpcode() == ISD::SETCC)
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Cond = LowerSETCC(Cond, DAG);
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// If condition flag is set by a MSP430ISD::CMP, then use it as the condition
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// setting operand in place of the MSP430ISD::SETCC.
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if (Cond.getOpcode() == MSP430ISD::SETCC) {
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CC = Cond.getOperand(0);
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Cond = Cond.getOperand(1);
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TrueV = Cond.getOperand(0);
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FalseV = Cond.getOperand(1);
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} else {
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CC = DAG.getConstant(MSP430::COND_NE, MVT::i16);
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Cond = DAG.getNode(MSP430ISD::CMP, dl, MVT::i16,
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Cond, DAG.getConstant(0, MVT::i16));
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}
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unsigned TargetCC = MSP430::COND_INVALID;
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SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
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SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Flag);
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SmallVector<SDValue, 4> Ops;
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Ops.push_back(TrueV);
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Ops.push_back(FalseV);
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Ops.push_back(CC);
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Ops.push_back(Cond);
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Ops.push_back(DAG.getConstant(TargetCC, MVT::i8));
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Ops.push_back(Flag);
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return DAG.getNode(MSP430ISD::SELECT, dl, VTs, &Ops[0], Ops.size());
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return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, &Ops[0], Ops.size());
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}
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SDValue MSP430TargetLowering::LowerSIGN_EXTEND(SDValue Op,
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@ -621,10 +593,9 @@ const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case MSP430ISD::RRC: return "MSP430ISD::RRC";
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case MSP430ISD::CALL: return "MSP430ISD::CALL";
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case MSP430ISD::Wrapper: return "MSP430ISD::Wrapper";
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case MSP430ISD::BRCOND: return "MSP430ISD::BRCOND";
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case MSP430ISD::BR_CC: return "MSP430ISD::BR_CC";
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case MSP430ISD::CMP: return "MSP430ISD::CMP";
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case MSP430ISD::SETCC: return "MSP430ISD::SETCC";
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case MSP430ISD::SELECT: return "MSP430ISD::SELECT";
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case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC";
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}
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}
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@ -52,11 +52,11 @@ namespace llvm {
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/// is the block to branch if condition is true, operand 2 is the
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/// condition code, and operand 3 is the flag operand produced by a CMP
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/// instruction.
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BRCOND,
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BR_CC,
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/// SELECT. Operand 0 and operand 1 are selection variable, operand 3 is
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/// condition code and operand 4 is flag operand.
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SELECT
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/// SELECT_CC. Operand 0 and operand 1 are selection variable, operand 3
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/// is condition code and operand 4 is flag operand.
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SELECT_CC
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};
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}
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@ -74,8 +74,6 @@ namespace llvm {
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/// DAG node.
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virtual const char *getTargetNodeName(unsigned Opcode) const;
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virtual MVT getSetCCResultType(MVT VT) const;
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SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
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SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
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SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
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@ -83,9 +81,8 @@ namespace llvm {
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SDValue LowerShifts(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG);
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SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG,
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@ -26,13 +26,11 @@ def SDT_MSP430Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
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def SDT_MSP430CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i16>]>;
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def SDT_MSP430CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i16>, SDTCisVT<1, i16>]>;
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def SDT_MSP430Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
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def SDT_MSP430SetCC : SDTypeProfile<1, 2, [SDTCisVT<0, i8>,
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SDTCisVT<1, i8>, SDTCisVT<2, i16>]>;
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def SDT_MSP430Cmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
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def SDT_MSP430BrCond : SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>,
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SDTCisVT<1, i8>, SDTCisVT<2, i16>]>;
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def SDT_MSP430Select : SDTypeProfile<1, 4, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,
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SDTCisVT<3, i8>, SDTCisVT<4, i16>]>;
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def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
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SDTCisVT<1, i8>]>;
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def SDT_MSP430SelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,
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SDTCisVT<3, i8>]>;
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//===----------------------------------------------------------------------===//
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// MSP430 Specific Node Definitions.
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@ -53,10 +51,9 @@ def MSP430callseq_end :
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SDNode<"ISD::CALLSEQ_END", SDT_MSP430CallSeqEnd,
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[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
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def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>;
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def MSP430setcc : SDNode<"MSP430ISD::SETCC", SDT_MSP430SetCC>;
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def MSP430cmp : SDNode<"MSP430ISD::CMP", SDT_MSP430Cmp>;
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def MSP430brcond : SDNode<"MSP430ISD::BRCOND", SDT_MSP430BrCond, [SDNPHasChain]>;
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def MSP430select : SDNode<"MSP430ISD::SELECT", SDT_MSP430Select>;
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def MSP430cmp : SDNode<"MSP430ISD::CMP", SDT_MSP430Cmp, [SDNPOutFlag]>;
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def MSP430brcc : SDNode<"MSP430ISD::BR_CC", SDT_MSP430BrCC, [SDNPHasChain, SDNPInFlag]>;
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def MSP430selectcc: SDNode<"MSP430ISD::SELECT_CC", SDT_MSP430SelectCC, [SDNPInFlag]>;
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//===----------------------------------------------------------------------===//
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// MSP430 Operand Definitions.
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@ -113,7 +110,7 @@ let usesCustomDAGSchedInserter = 1 in {
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def Select16 : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$cc),
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"# Select16 PSEUDO",
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[(set GR16:$dst,
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(MSP430select GR16:$src1, GR16:$src2, imm:$cc, SRW))]>;
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(MSP430selectcc GR16:$src1, GR16:$src2, imm:$cc))]>;
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}
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let neverHasSideEffects = 1 in
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@ -140,7 +137,7 @@ let isBarrier = 1 in
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let Uses = [SRW] in
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def JCC : Pseudo<(outs), (ins brtarget:$dst, cc:$cc),
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"j$cc $dst",
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[(MSP430brcond bb:$dst, imm:$cc, SRW)]>;
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[(MSP430brcc bb:$dst, imm:$cc)]>;
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} // isBranch, isTerminator
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//===----------------------------------------------------------------------===//
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