forked from OSchip/llvm-project
Fix all these headers to properly mark the doxygen comments.
llvm-svn: 297505
This commit is contained in:
parent
8f70e249a7
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@ -6,37 +6,40 @@
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// \file This file provides an implementation of debug counters. Debug counters
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// are a tool that let you narrow down a miscompilation to a specific thing
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// happening. To give a use case: Imagine you have a file, very large, and you
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// are trying to understand the minimal transformation that breaks it. Bugpoint
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// and bisection is often helpful here in narrowing it down to a specific pass,
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// but it's still a very large file, and a very complicated pass to try to
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// debug. That is where debug counting steps in. You can instrument the pass
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// with a debug counter before it does a certain thing, and depending on the
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// counts, it will either execute that thing or not. The debug counter itself
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// consists of a skip and a count. Skip is the number of times shouldExecute
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// needs to be called before it returns true. Count is the number of times to
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// return true once Skip is 0. So a skip=47, count=2 ,would skip the first 47
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// executions by returning false from shouldExecute, then execute twice, and
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// then return false again.
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// Note that a counter set to a negative number will always execute.
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// For a concrete example, during predicateinfo creation, the renaming pass
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// replaces each use with a renamed use.
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/// \file
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/// \brief This file provides an implementation of debug counters. Debug counters
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/// are a tool that let you narrow down a miscompilation to a specific thing
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/// happening.
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///
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// If I use DEBUG_COUNTER to create a counter called "predicateinfo", and
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// variable name RenameCounter, and then instrument this renaming with a debug
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// counter, like so:
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//
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// if (!DebugCounter::shouldExecute(RenameCounter)
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// <continue or return or whatever not executing looks like>
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//
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// Now I can, from the command line, make it rename or not rename certain uses
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// by setting the skip and count.
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// So for example
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// bin/opt -debug-counter=predicateinfo-skip=47,predicateinfo-count=1
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// will skip renaming the first 47 uses, then rename one, then skip the rest.
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/// To give a use case: Imagine you have a file, very large, and you
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/// are trying to understand the minimal transformation that breaks it. Bugpoint
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/// and bisection is often helpful here in narrowing it down to a specific pass,
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/// but it's still a very large file, and a very complicated pass to try to
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/// debug. That is where debug counting steps in. You can instrument the pass
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/// with a debug counter before it does a certain thing, and depending on the
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/// counts, it will either execute that thing or not. The debug counter itself
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/// consists of a skip and a count. Skip is the number of times shouldExecute
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/// needs to be called before it returns true. Count is the number of times to
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/// return true once Skip is 0. So a skip=47, count=2 ,would skip the first 47
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/// executions by returning false from shouldExecute, then execute twice, and
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/// then return false again.
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/// Note that a counter set to a negative number will always execute.
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/// For a concrete example, during predicateinfo creation, the renaming pass
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/// replaces each use with a renamed use.
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////
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/// If I use DEBUG_COUNTER to create a counter called "predicateinfo", and
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/// variable name RenameCounter, and then instrument this renaming with a debug
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/// counter, like so:
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///
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/// if (!DebugCounter::shouldExecute(RenameCounter)
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/// <continue or return or whatever not executing looks like>
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///
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/// Now I can, from the command line, make it rename or not rename certain uses
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/// by setting the skip and count.
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/// So for example
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/// bin/opt -debug-counter=predicateinfo-skip=47,predicateinfo-count=1
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/// will skip renaming the first 47 uses, then rename one, then skip the rest.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_DEBUGCOUNTER_H
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#define LLVM_SUPPORT_DEBUGCOUNTER_H
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@ -6,67 +6,67 @@
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// \file
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// \brief This file exposes an interface to building/using memory SSA to
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// walk memory instructions using a use/def graph.
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//
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// Memory SSA class builds an SSA form that links together memory access
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// instructions such as loads, stores, atomics, and calls. Additionally, it does
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// a trivial form of "heap versioning" Every time the memory state changes in
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// the program, we generate a new heap version. It generates MemoryDef/Uses/Phis
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// that are overlayed on top of the existing instructions.
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//
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// As a trivial example,
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// define i32 @main() #0 {
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// entry:
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// %call = call noalias i8* @_Znwm(i64 4) #2
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// %0 = bitcast i8* %call to i32*
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// %call1 = call noalias i8* @_Znwm(i64 4) #2
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// %1 = bitcast i8* %call1 to i32*
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// store i32 5, i32* %0, align 4
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// store i32 7, i32* %1, align 4
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// %2 = load i32* %0, align 4
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// %3 = load i32* %1, align 4
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// %add = add nsw i32 %2, %3
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// ret i32 %add
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// }
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//
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// Will become
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// define i32 @main() #0 {
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// entry:
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// ; 1 = MemoryDef(0)
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// %call = call noalias i8* @_Znwm(i64 4) #3
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// %2 = bitcast i8* %call to i32*
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// ; 2 = MemoryDef(1)
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// %call1 = call noalias i8* @_Znwm(i64 4) #3
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// %4 = bitcast i8* %call1 to i32*
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// ; 3 = MemoryDef(2)
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// store i32 5, i32* %2, align 4
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// ; 4 = MemoryDef(3)
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// store i32 7, i32* %4, align 4
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// ; MemoryUse(3)
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// %7 = load i32* %2, align 4
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// ; MemoryUse(4)
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// %8 = load i32* %4, align 4
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// %add = add nsw i32 %7, %8
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// ret i32 %add
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// }
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//
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// Given this form, all the stores that could ever effect the load at %8 can be
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// gotten by using the MemoryUse associated with it, and walking from use to def
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// until you hit the top of the function.
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//
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// Each def also has a list of users associated with it, so you can walk from
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// both def to users, and users to defs. Note that we disambiguate MemoryUses,
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// but not the RHS of MemoryDefs. You can see this above at %7, which would
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// otherwise be a MemoryUse(4). Being disambiguated means that for a given
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// store, all the MemoryUses on its use lists are may-aliases of that store (but
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// the MemoryDefs on its use list may not be).
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//
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// MemoryDefs are not disambiguated because it would require multiple reaching
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// definitions, which would require multiple phis, and multiple memoryaccesses
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// per instruction.
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///
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/// \file
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/// \brief This file exposes an interface to building/using memory SSA to
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/// walk memory instructions using a use/def graph.
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///
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/// Memory SSA class builds an SSA form that links together memory access
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/// instructions such as loads, stores, atomics, and calls. Additionally, it does
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/// a trivial form of "heap versioning" Every time the memory state changes in
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/// the program, we generate a new heap version. It generates MemoryDef/Uses/Phis
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/// that are overlayed on top of the existing instructions.
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///
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/// As a trivial example,
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/// define i32 @main() #0 {
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/// entry:
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/// %call = call noalias i8* @_Znwm(i64 4) #2
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/// %0 = bitcast i8* %call to i32*
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/// %call1 = call noalias i8* @_Znwm(i64 4) #2
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/// %1 = bitcast i8* %call1 to i32*
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/// store i32 5, i32* %0, align 4
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/// store i32 7, i32* %1, align 4
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/// %2 = load i32* %0, align 4
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/// %3 = load i32* %1, align 4
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/// %add = add nsw i32 %2, %3
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/// ret i32 %add
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/// }
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///
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/// Will become
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/// define i32 @main() #0 {
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/// entry:
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/// ; 1 = MemoryDef(0)
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/// %call = call noalias i8* @_Znwm(i64 4) #3
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/// %2 = bitcast i8* %call to i32*
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/// ; 2 = MemoryDef(1)
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/// %call1 = call noalias i8* @_Znwm(i64 4) #3
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/// %4 = bitcast i8* %call1 to i32*
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/// ; 3 = MemoryDef(2)
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/// store i32 5, i32* %2, align 4
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/// ; 4 = MemoryDef(3)
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/// store i32 7, i32* %4, align 4
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/// ; MemoryUse(3)
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/// %7 = load i32* %2, align 4
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/// ; MemoryUse(4)
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/// %8 = load i32* %4, align 4
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/// %add = add nsw i32 %7, %8
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/// ret i32 %add
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/// }
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///
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/// Given this form, all the stores that could ever effect the load at %8 can be
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/// gotten by using the MemoryUse associated with it, and walking from use to def
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/// until you hit the top of the function.
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///
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/// Each def also has a list of users associated with it, so you can walk from
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/// both def to users, and users to defs. Note that we disambiguate MemoryUses,
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/// but not the RHS of MemoryDefs. You can see this above at %7, which would
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/// otherwise be a MemoryUse(4). Being disambiguated means that for a given
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/// store, all the MemoryUses on its use lists are may-aliases of that store (but
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/// the MemoryDefs on its use list may not be).
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///
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/// MemoryDefs are not disambiguated because it would require multiple reaching
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/// definitions, which would require multiple phis, and multiple memoryaccesses
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/// per instruction.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_MEMORYSSA_H
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@ -6,47 +6,46 @@
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// \file
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// \brief
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//
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// This file implements the PredicateInfo analysis, which creates an Extended
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// SSA form for operations used in branch comparisons and llvm.assume
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// comparisons. Copies of these operations are inserted into the true/false
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// edge (and after assumes), and information attached to the copies. All uses
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// of the original operation in blocks dominated by the true/false edge (and
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// assume), are replaced with uses of the copies. This enables passes to easily
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// and sparsely propagate condition based info into the operations that may be
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// affected.
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//
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// Example:
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// %cmp = icmp eq i32 %x, 50
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// br i1 %cmp, label %true, label %false
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// true:
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// ret i32 %x
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// false:
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// ret i32 1
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//
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// will become
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//
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// %cmp = icmp eq i32, %x, 50
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// br i1 %cmp, label %true, label %false
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// true:
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// %x.0 = call @llvm.ssa_copy.i32(i32 %x)
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// ret i32 %x.0
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// false:
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// ret i32 1
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//
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// Using getPredicateInfoFor on x.0 will give you the comparison it is
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// dominated by (the icmp), and that you are located in the true edge of that
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// comparison, which tells you x.0 is 50.
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//
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// In order to reduce the number of copies inserted, predicateinfo is only
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// inserted where it would actually be live. This means if there are no uses of
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// an operation dominated by the branch edges, or by an assume, the associated
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// predicate info is never inserted.
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//
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//
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///
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/// \file
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/// \brief This file implements the PredicateInfo analysis, which creates an Extended
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/// SSA form for operations used in branch comparisons and llvm.assume
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/// comparisons.
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///
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/// Copies of these operations are inserted into the true/false edge (and after
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/// assumes), and information attached to the copies. All uses of the original
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/// operation in blocks dominated by the true/false edge (and assume), are
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/// replaced with uses of the copies. This enables passes to easily and sparsely
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/// propagate condition based info into the operations that may be affected.
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///
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/// Example:
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/// %cmp = icmp eq i32 %x, 50
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/// br i1 %cmp, label %true, label %false
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/// true:
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/// ret i32 %x
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/// false:
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/// ret i32 1
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///
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/// will become
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///
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/// %cmp = icmp eq i32, %x, 50
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/// br i1 %cmp, label %true, label %false
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/// true:
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/// %x.0 = call @llvm.ssa_copy.i32(i32 %x)
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/// ret i32 %x.0
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/// false:
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/// ret i32 1
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///
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/// Using getPredicateInfoFor on x.0 will give you the comparison it is
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/// dominated by (the icmp), and that you are located in the true edge of that
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/// comparison, which tells you x.0 is 50.
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///
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/// In order to reduce the number of copies inserted, predicateinfo is only
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/// inserted where it would actually be live. This means if there are no uses of
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/// an operation dominated by the branch edges, or by an assume, the associated
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/// predicate info is never inserted.
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///
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_PREDICATEINFO_H
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