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[PowerPC][AIX] Enable sret arguments. 

Removes the fatal error for sret arguments and adds lit testing.

Differential Revision: https://reviews.llvm.org/D71504
This commit is contained in:
Sean Fertile 2020-01-02 19:29:56 -05:00
parent 783db78835
commit 479e9406c2
2 changed files with 90 additions and 10 deletions
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3
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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@ -6826,9 +6826,6 @@ static bool CC_AIX(unsigned ValNo, MVT ValVT, MVT LocVT,
if (ArgFlags.isByVal()) if (ArgFlags.isByVal())
report_fatal_error("Passing structure by value is unimplemented."); report_fatal_error("Passing structure by value is unimplemented.");
if (ArgFlags.isSRet())
report_fatal_error("Struct return arguments are unimplemented.");
if (ArgFlags.isNest()) if (ArgFlags.isNest())
report_fatal_error("Nest arguments are unimplemented."); report_fatal_error("Nest arguments are unimplemented.");

97
llvm/test/CodeGen/PowerPC/aix-sret-param.ll
View File

@ -1,15 +1,98 @@
; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: -stop-after=machine-cp --verify-machineinstrs < %s | FileCheck \
; RUN: --check-prefixes=MIR,MIR32 %s
%struct.S = type { i32 } ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
; RUN: -stop-after=machine-cp --verify-machineinstrs < %s | FileCheck \
; RUN: --check-prefixes=MIR,MIR64 %s
define void @barv() { ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
; RUN: --verify-machineinstrs < %s | FileCheck --check-prefixes=ASM,ASM32 %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
; RUN: --verify-machineinstrs < %s | FileCheck --check-prefixes=ASM,ASM64 %s
%struct.S = type { i8 }
%struct.T = type { double, i32, i32, i32, float }
define void @test1() {
entry: entry:
%tmp = alloca %struct.S, align 4 %s = alloca %struct.S, align 4
call void @foo(%struct.S* sret %tmp) call void @foo(%struct.S* sret %s)
ret void
}
define void @test2() {
entry:
%t = alloca %struct.T, align 8
call void @bar(%struct.T* sret %t)
ret void ret void
} }
declare void @foo(%struct.S* sret) declare void @foo(%struct.S* sret)
declare void @bar(%struct.T* sret)
; CHECK: LLVM ERROR: Struct return arguments are unimplemented. ; MIR: name: test1
; MIR: stack:
; MIR-NEXT: - { id: 0, name: s, type: default, offset: 0, size: 1, alignment: 8,
; MIR32: bb.0.entry:
; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
; MIR32-NEXT: renamable $r3 = ADDI %stack.0.s, 0
; MIR32-NEXT: BL_NOP <mcsymbol .foo>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
; MIR64: bb.0.entry:
; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.s, 0
; MIR64-NEXT: BL8_NOP <mcsymbol .foo>, csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
; ASM-LABEL: .test1:
; ASM32: stwu 1, -64(1)
; ASM32-NEXT: addi 3, 1, 56
; ASM32-NEXT: bl .foo
; ASM32-NEXT: nop
; ASM32-NEXT: addi 1, 1, 64
; ASM64: stdu 1, -128(1)
; ASM64-NEXT: addi 3, 1, 120
; ASM64-NEXT: bl .foo
; ASM64-NEXT: nop
; ASM64-NEXT: addi 1, 1, 128
; MIR: name: test2
; MIR: stack:
; MIR-NEXT: - { id: 0, name: t, type: default, offset: 0, size: 24, alignment: 8,
; MIR32: bb.0.entry:
; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
; MIR32-NEXT: renamable $r3 = ADDI %stack.0.t, 0
; MIR32-NEXT: BL_NOP <mcsymbol .bar>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
; MIR64: bb.0.entry:
; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.t, 0
; MIR64-NEXT: BL8_NOP <mcsymbol .bar>, csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
; ASM-LABEL: .test2:
; ASM32: stwu 1, -80(1)
; ASM32-NEXT: addi 3, 1, 56
; ASM32-NEXT: bl .bar
; ASM32-NEXT: nop
; ASM32-NEXT: addi 1, 1, 80
; ASM64: stdu 1, -144(1)
; ASM64-NEXT: addi 3, 1, 120
; ASM64-NEXT: bl .bar
; ASM64-NEXT: nop
; ASM64-NEXT: addi 1, 1, 144