[X86] Fix checked arithmetic for i8 on X86.

When lowering a ISD::BRCOND into a test+branch, make sure that we
always use the correct condition code to emit the test operation.

This fixes PR19858: "i8 checked mul is wrong on x86".

Patch by Keno Fisher!

llvm-svn: 210032
This commit is contained in:
Andrea Di Biagio 2014-06-02 16:00:27 +00:00
parent 88996755cb
commit 4760813831
2 changed files with 27 additions and 2 deletions

View File

@ -11482,8 +11482,9 @@ SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
}
if (addTest) {
CC = DAG.getConstant(X86::COND_NE, MVT::i8);
Cond = EmitTest(Cond, X86::COND_NE, dl, DAG);
X86::CondCode X86Cond = Inverted ? X86::COND_E : X86::COND_NE;
CC = DAG.getConstant(X86Cond, MVT::i8);
Cond = EmitTest(Cond, X86Cond, dl, DAG);
}
Cond = ConvertCmpIfNecessary(Cond, DAG);
return DAG.getNode(X86ISD::BRCOND, dl, Op.getValueType(),

View File

@ -0,0 +1,24 @@
; RUN: llc -mcpu=generic -march=x86 < %s | FileCheck %s
; PR19858
declare {i8, i1} @llvm.umul.with.overflow.i8(i8 %a, i8 %b)
define i8 @testumulo(i32 %argc) {
; CHECK: imulw
; CHECK: testb %{{.+}}, %{{.+}}
; CHECK: je [[NOOVERFLOWLABEL:.+]]
; CHECK: {{.*}}[[NOOVERFLOWLABEL]]:
; CHECK-NEXT: movb
; CHECK-NEXT: retl
top:
%RHS = trunc i32 %argc to i8
%umul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 25, i8 %RHS)
%ex = extractvalue { i8, i1 } %umul, 1
br i1 %ex, label %overflow, label %nooverlow
overflow:
ret i8 %RHS
nooverlow:
%umul.value = extractvalue { i8, i1 } %umul, 0
ret i8 %umul.value
}