From 4754e2d59c20f0ba43336a0e5d20c8ee06949a6a Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Mon, 24 Aug 2015 13:48:10 +0000 Subject: [PATCH] [sanitizers] Add DFSan support for AArch64 42-bit VMA This patch adds support for dfsan on aarch64-linux with 42-bit VMA (current default config for 64K pagesize kernels). The support is enabled by defining the SANITIZER_AARCH64_VMA to 42 at build time for both clang/llvm and compiler-rt. The default VMA is 39 bits. llvm-svn: 245840 --- .../Instrumentation/DataFlowSanitizer.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp index 8344e087a959..c613f2577a68 100644 --- a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp @@ -72,6 +72,16 @@ using namespace llvm; +// VMA size definition for architecture that support multiple sizes. +// AArch64 has 3 VMA sizes: 39, 42 and 48. +#ifndef SANITIZER_AARCH64_VMA +# define SANITIZER_AARCH64_VMA 39 +#else +# if SANITIZER_AARCH64_VMA != 39 && SANITIZER_AARCH64_VMA != 42 +# error "invalid SANITIZER_AARCH64_VMA size" +# endif +#endif + // The -dfsan-preserve-alignment flag controls whether this pass assumes that // alignment requirements provided by the input IR are correct. For example, // if the input IR contains a load with alignment 8, this flag will cause @@ -437,7 +447,11 @@ bool DataFlowSanitizer::doInitialization(Module &M) { else if (IsMIPS64) ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0xF000000000LL); else if (IsAArch64) +#if SANITIZER_AARCH64_VMA == 39 ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0x7800000000LL); +#else + ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0x3c000000000LL); +#endif else report_fatal_error("unsupported triple");