maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[AMDGPU][MC][GFX9] Added s_dcache_discard* instructions 

See bug 36838: https://bugs.llvm.org/show_bug.cgi?id=36838

Differential Revision: https://reviews.llvm.org/D45247

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329397
This commit is contained in:
Dmitry Preobrazhensky 2018-04-06 15:08:42 +00:00
parent 45735b8e40
commit 4732d876ee
3 changed files with 66 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
llvm/lib/Target/AMDGPU/SMInstructions.td
View File

@ -81,6 +81,18 @@ class SM_Store_Pseudo <string opName, dag ins, string asmOps, list<dag> pattern
let ScalarStore = 1;
}
class SM_Discard_Pseudo <string opName, dag ins, bit isImm>
: SM_Pseudo<opName, (outs), ins, " $sbase, $offset"> {
let mayLoad = 0;
let mayStore = 0;
let has_glc = 0;
let has_sdst = 0;
let ScalarStore = 0;
let hasSideEffects = 1;
let offset_is_imm = isImm;
let PseudoInstr = opName # !if(isImm, "_IMM", "_SGPR");
}
multiclass SM_Pseudo_Loads<string opName,
RegisterClass baseClass,
RegisterClass dstClass> {
@ -125,6 +137,11 @@ multiclass SM_Pseudo_Stores<string opName,
}
}
multiclass SM_Pseudo_Discards<string opName> {
def _IMM : SM_Discard_Pseudo <opName, (ins SReg_64:$sbase, smrd_offset_20:$offset), 1>;
def _SGPR : SM_Discard_Pseudo <opName, (ins SReg_64:$sbase, SReg_32:$offset), 0>;
}
class SM_Time_Pseudo<string opName, SDPatternOperator node> : SM_Pseudo<
opName, (outs SReg_64_XEXEC:$sdst), (ins),
" $sdst", [(set i64:$sdst, (node))]> {
@ -332,6 +349,11 @@ defm S_ATOMIC_DEC_X2 : SM_Pseudo_Atomics <"s_atomic_dec_x2", SReg_6
} // let SubtargetPredicate = HasScalarAtomics
let SubtargetPredicate = isGFX9 in {
defm S_DCACHE_DISCARD : SM_Pseudo_Discards <"s_dcache_discard">;
defm S_DCACHE_DISCARD_X2 : SM_Pseudo_Discards <"s_dcache_discard_x2">;
}
//===----------------------------------------------------------------------===//
// Scalar Memory Patterns
//===----------------------------------------------------------------------===//
@ -636,6 +658,14 @@ defm S_ATOMIC_XOR_X2 : SM_Real_Atomics_vi <0xaa, "S_ATOMIC_XOR_X2">
defm S_ATOMIC_INC_X2 : SM_Real_Atomics_vi <0xab, "S_ATOMIC_INC_X2">;
defm S_ATOMIC_DEC_X2 : SM_Real_Atomics_vi <0xac, "S_ATOMIC_DEC_X2">;
multiclass SM_Real_Discard_vi<bits<8> op, string ps> {
def _IMM_vi : SMEM_Real_vi <op, !cast<SM_Discard_Pseudo>(ps#_IMM)>;
def _SGPR_vi : SMEM_Real_vi <op, !cast<SM_Discard_Pseudo>(ps#_SGPR)>;
}
defm S_DCACHE_DISCARD : SM_Real_Discard_vi <0x28, "S_DCACHE_DISCARD">;
defm S_DCACHE_DISCARD_X2 : SM_Real_Discard_vi <0x29, "S_DCACHE_DISCARD_X2">;
//===----------------------------------------------------------------------===//
// CI
//===----------------------------------------------------------------------===//

20
llvm/test/MC/AMDGPU/smem.s
View File

@ -213,6 +213,26 @@ s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc
// GFX9: s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc ; encoding: [0x02,0x01,0x5d,0xc0,0x00,0x00,0x00,0x00]
// NOSICIVI: error
//===----------------------------------------------------------------------===//
// s_dcache_discard instructions
//===----------------------------------------------------------------------===//
s_dcache_discard s[2:3], s0
// GFX9: s_dcache_discard s[2:3], s0 ; encoding: [0x01,0x00,0xa0,0xc0,0x00,0x00,0x00,0x00]
// NOSICIVI: error: instruction not supported on this GPU
s_dcache_discard s[2:3], 0x0
// GFX9: s_dcache_discard s[2:3], 0x0 ; encoding: [0x01,0x00,0xa2,0xc0,0x00,0x00,0x00,0x00]
// NOSICIVI: error: instruction not supported on this GPU
s_dcache_discard_x2 s[2:3], s101
// GFX9: s_dcache_discard_x2 s[2:3], s101 ; encoding: [0x01,0x00,0xa4,0xc0,0x65,0x00,0x00,0x00]
// NOSICIVI: error: instruction not supported on this GPU
s_dcache_discard_x2 s[2:3], 0x0
// GFX9: s_dcache_discard_x2 s[2:3], 0x0 ; encoding: [0x01,0x00,0xa6,0xc0,0x00,0x00,0x00,0x00]
// NOSICIVI: error: instruction not supported on this GPU
//===----------------------------------------------------------------------===//
// s_atomic instructions
//===----------------------------------------------------------------------===//

16
llvm/test/MC/Disassembler/AMDGPU/smem_gfx9.txt
View File

@ -31,6 +31,22 @@
# GFX9: s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc ; encoding: [0x02,0x01,0x5d,0xc0,0x00,0x00,0x00,0x00]
0x02,0x01,0x5d,0xc0,0x00,0x00,0x00,0x00
#===------------------------------------------------------------------------===#
# s_dcache_discard
#===------------------------------------------------------------------------===#
# GFX9: s_dcache_discard s[100:101], s0 ; encoding: [0x32,0x00,0xa0,0xc0,0x00,0x00,0x00,0x00]
0x32,0x00,0xa0,0xc0,0x00,0x00,0x00,0x00
# GFX9: s_dcache_discard s[2:3], 0x0 ; encoding: [0x01,0x00,0xa2,0xc0,0x00,0x00,0x00,0x00]
0x01,0x00,0xa2,0xc0,0x00,0x00,0x00,0x00
# GFX9: s_dcache_discard_x2 s[2:3], s101 ; encoding: [0x01,0x00,0xa4,0xc0,0x65,0x00,0x00,0x00]
0x01,0x00,0xa4,0xc0,0x65,0x00,0x00,0x00
# GFX9: s_dcache_discard_x2 s[2:3], 0x0 ; encoding: [0x01,0x00,0xa6,0xc0,0x00,0x00,0x00,0x00]
0x01,0x00,0xa6,0xc0,0x00,0x00,0x00,0x00
#===------------------------------------------------------------------------===#
# s_atomic
#===------------------------------------------------------------------------===#