forked from OSchip/llvm-project
[RISCV] Implement RISCVTTIImpl::getMaxVScale correctly
The comments in the existing code appear to pre-exist the standardization of the +v extension. In particular, the specification *does* provide a bound on the maximum value VLEN can take. From what I can tell, the LMUL comment was simply a misunderstanding of what this API returns. This API returns the maximum value that vscale can take at runtime. This is used in the vectorizer to bound the largest scalable VF (e.g. LMUL in RISCV terms) which can be used without violating memory dependence. Differential Revision: https://reviews.llvm.org/D128538
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llvm/lib/Target/RISCV
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@ -132,16 +132,8 @@ bool RISCVTTIImpl::shouldExpandReduction(const IntrinsicInst *II) const {
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}
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Optional<unsigned> RISCVTTIImpl::getMaxVScale() const {
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Optional<unsigned> RISCVTTIImpl::getMaxVScale() const {
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// There is no assumption of the maximum vector length in V specification.
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if (ST->hasVInstructions())
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// We use the value specified by users as the maximum vector length.
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return ST->getRealMaxVLen() / RISCV::RVVBitsPerBlock;
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// This function will use the assumed maximum vector length to get the
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// maximum vscale for LoopVectorizer.
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// If users do not specify the maximum vector length, we have no way to
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// know whether the LoopVectorizer is safe to do or not.
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// We only consider to use single vector register (LMUL = 1) to vectorize.
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unsigned MaxVectorSizeInBits = ST->getMaxRVVVectorSizeInBits();
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if (ST->hasVInstructions() && MaxVectorSizeInBits != 0)
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return MaxVectorSizeInBits / RISCV::RVVBitsPerBlock;
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return BaseT::getMaxVScale();
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return BaseT::getMaxVScale();
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}
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}
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