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[X86] Add (or (and X, c1), c2) -> (and (or X, c2), c1|c2) non-splat vector test 

llvm-svn: 321278
This commit is contained in:
Simon Pilgrim 2017-12-21 16:08:41 +00:00
parent 71ff9fa65f
commit 4707709d1b
1 changed files with 14 additions and 4 deletions
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18
llvm/test/CodeGen/X86/combine-or.ll
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@ -430,8 +430,7 @@ define <4 x i32> @test2f(<4 x i32> %a, <4 x i32> %b) {
ret <4 x i32> %or
}
; TODO: Why would we do this?
; (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
; (or (and X, c1), c2) -> (and (or X, c2), c1|c2) iff (c1 & c2) != 0
define <2 x i64> @or_and_v2i64(<2 x i64> %a0) {
; CHECK-LABEL: or_and_v2i64:
@ -444,11 +443,22 @@ define <2 x i64> @or_and_v2i64(<2 x i64> %a0) {
ret <2 x i64> %2
}
; If all masked bits are going to be set, that's a constant fold.
define <4 x i32> @or_and_v4i32(<4 x i32> %a0) {
; CHECK-LABEL: or_and_v4i32:
; CHECK: # %bb.0:
; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq
%1 = and <4 x i32> %a0, <i32 1, i32 3, i32 5, i32 7>
%2 = or <4 x i32> %1, <i32 3, i32 2, i32 15, i32 2>
ret <4 x i32> %2
}
; If all masked bits are going to be set, that's a constant fold.
define <4 x i32> @or_and_v4i32_fold(<4 x i32> %a0) {
; CHECK-LABEL: or_and_v4i32_fold:
; CHECK: # %bb.0:
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [3,3,3,3]
; CHECK-NEXT: retq
%1 = and <4 x i32> %a0, <i32 1, i32 1, i32 1, i32 1>