[ARM] Fix Thumb2 compare being emitted ExpandCMP_SWAP

Given a patch like D129506, using instructions not valid for the current
target feature set becomes an error. This fixes an issue in
ARMExpandPseudo::ExpandCMP_SWAP where Thumb2 compares were used in
Thumb1Only code, such as thumbv8m.baseline targets.

Differential Revision: https://reviews.llvm.org/D129695

llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp

@@ -1720,6 +1720,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock &MBB,
                                      unsigned UxtOp,
                                      MachineBasicBlock::iterator &NextMBBI) {
   bool IsThumb = STI->isThumb();
+  bool IsThumb1Only = STI->isThumb1Only();
   MachineInstr &MI = *MBBI;
   DebugLoc DL = MI.getDebugLoc();
   const MachineOperand &Dest = MI.getOperand(0);
@@ -1794,7 +1795,8 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock &MBB,
     MIB.addImm(0); // a 32-bit Thumb strex (only) allows an offset.
   MIB.add(predOps(ARMCC::AL));
 
-  unsigned CMPri = IsThumb ? ARM::t2CMPri : ARM::CMPri;
+  unsigned CMPri =
+      IsThumb ? (IsThumb1Only ? ARM::tCMPi8 : ARM::t2CMPri) : ARM::CMPri;
   BuildMI(StoreBB, DL, TII->get(CMPri))
       .addReg(TempReg, RegState::Kill)
       .addImm(0)
@@ -1848,6 +1850,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator MBBI,
                                         MachineBasicBlock::iterator &NextMBBI) {
   bool IsThumb = STI->isThumb();
+  assert(!STI->isThumb1Only() && "CMP_SWAP_64 unsupported under Thumb1!");
   MachineInstr &MI = *MBBI;
   DebugLoc DL = MI.getDebugLoc();
   MachineOperand &Dest = MI.getOperand(0);
@@ -3044,6 +3047,9 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
       assert(STI->isThumb());
       return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREXH, ARM::t2STREXH, ARM::tUXTH,
                             NextMBBI);
+    case ARM::tCMP_SWAP_32:
+      assert(STI->isThumb());
+      return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREX, ARM::t2STREX, 0, NextMBBI);
 
     case ARM::CMP_SWAP_8:
       assert(!STI->isThumb());
@@ -3054,11 +3060,8 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
       return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREXH, ARM::STREXH, ARM::UXTH,
                             NextMBBI);
     case ARM::CMP_SWAP_32:
-      if (STI->isThumb())
+      assert(!STI->isThumb());
-        return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREX, ARM::t2STREX, 0,
+      return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREX, ARM::STREX, 0, NextMBBI);
-                              NextMBBI);
-      else
-        return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREX, ARM::STREX, 0, NextMBBI);
 
     case ARM::CMP_SWAP_64:
       return ExpandCMP_SWAP_64(MBB, MBBI, NextMBBI);

llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

@@ -3512,7 +3512,7 @@ void ARMDAGToDAGISel::SelectCMP_SWAP(SDNode *N) {
   else if (MemTy == MVT::i16)
     Opcode = Subtarget->isThumb() ? ARM::tCMP_SWAP_16 : ARM::CMP_SWAP_16;
   else if (MemTy == MVT::i32)
-    Opcode = ARM::CMP_SWAP_32;
+    Opcode = Subtarget->isThumb() ? ARM::tCMP_SWAP_32 : ARM::CMP_SWAP_32;
   else
     llvm_unreachable("Unknown AtomicCmpSwap type");
 

llvm/lib/Target/ARM/ARMInstrThumb.td

@@ -1782,11 +1782,15 @@ def tLDRConstPool
 
 let Constraints = "@earlyclobber $Rd,@earlyclobber $temp",
     mayLoad = 1, mayStore = 1 in {
-def tCMP_SWAP_8 : PseudoInst<(outs GPR:$Rd, GPR:$temp),
+def tCMP_SWAP_8 : PseudoInst<(outs GPR:$Rd, tGPR:$temp),
                              (ins GPR:$addr, tGPR:$desired, GPR:$new),
                              NoItinerary, []>, Sched<[]>;
 
-def tCMP_SWAP_16 : PseudoInst<(outs GPR:$Rd, GPR:$temp),
+def tCMP_SWAP_16 : PseudoInst<(outs GPR:$Rd, tGPR:$temp),
                               (ins GPR:$addr, tGPR:$desired, GPR:$new),
                               NoItinerary, []>, Sched<[]>;
+
+def tCMP_SWAP_32 : PseudoInst<(outs GPR:$Rd, tGPR:$temp),
+                              (ins GPR:$addr, GPR:$desired, GPR:$new),
+                              NoItinerary, []>, Sched<[]>;
 }

llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll

@@ -190,7 +190,7 @@ define i8 @test_xchg_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB0_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB0_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB0_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB0_1 Depth=1
@@ -387,7 +387,7 @@ define i8 @test_add_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB1_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB1_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB1_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB1_1 Depth=1
@@ -584,7 +584,7 @@ define i8 @test_sub_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB2_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB2_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB2_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB2_1 Depth=1
@@ -783,7 +783,7 @@ define i8 @test_and_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB3_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB3_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB3_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB3_1 Depth=1
@@ -988,7 +988,7 @@ define i8 @test_nand_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB4_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB4_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB4_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB4_1 Depth=1
@@ -1187,7 +1187,7 @@ define i8 @test_or_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB5_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB5_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB5_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB5_1 Depth=1
@@ -1386,7 +1386,7 @@ define i8 @test_xor_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB6_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB6_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB6_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB6_1 Depth=1
@@ -1607,7 +1607,7 @@ define i8 @test_max_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB7_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB7_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB7_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB7_1 Depth=1
@@ -1828,7 +1828,7 @@ define i8 @test_min_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB8_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB8_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB8_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB8_1 Depth=1
@@ -2054,7 +2054,7 @@ define i8 @test_umax_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB9_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r5, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB9_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB9_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB9_1 Depth=1
@@ -2279,7 +2279,7 @@ define i8 @test_umin_i8() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB10_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexb r2, r5, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB10_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB10_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB10_1 Depth=1
@@ -2477,7 +2477,7 @@ define i16 @test_xchg_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB11_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB11_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB11_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB11_1 Depth=1
@@ -2674,7 +2674,7 @@ define i16 @test_add_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB12_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB12_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB12_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB12_1 Depth=1
@@ -2871,7 +2871,7 @@ define i16 @test_sub_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB13_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB13_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB13_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB13_1 Depth=1
@@ -3070,7 +3070,7 @@ define i16 @test_and_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB14_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB14_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB14_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB14_1 Depth=1
@@ -3275,7 +3275,7 @@ define i16 @test_nand_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB15_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB15_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB15_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB15_1 Depth=1
@@ -3474,7 +3474,7 @@ define i16 @test_or_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB16_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB16_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB16_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB16_1 Depth=1
@@ -3673,7 +3673,7 @@ define i16 @test_xor_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB17_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB17_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB17_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB17_1 Depth=1
@@ -3894,7 +3894,7 @@ define i16 @test_max_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB18_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB18_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB18_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB18_1 Depth=1
@@ -4115,7 +4115,7 @@ define i16 @test_min_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB19_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB19_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB19_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB19_1 Depth=1
@@ -4341,7 +4341,7 @@ define i16 @test_umax_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB20_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r5, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB20_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB20_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB20_1 Depth=1
@@ -4566,7 +4566,7 @@ define i16 @test_umin_i16() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB21_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strexh r2, r5, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB21_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB21_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB21_1 Depth=1
@@ -4757,7 +4757,7 @@ define i32 @test_xchg_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB22_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB22_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB22_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB22_1 Depth=1
@@ -4946,7 +4946,7 @@ define i32 @test_add_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB23_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB23_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB23_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB23_1 Depth=1
@@ -5135,7 +5135,7 @@ define i32 @test_sub_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB24_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB24_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB24_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB24_1 Depth=1
@@ -5326,7 +5326,7 @@ define i32 @test_and_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB25_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB25_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB25_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB25_1 Depth=1
@@ -5523,7 +5523,7 @@ define i32 @test_nand_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB26_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB26_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB26_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB26_1 Depth=1
@@ -5714,7 +5714,7 @@ define i32 @test_or_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB27_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB27_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB27_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB27_1 Depth=1
@@ -5905,7 +5905,7 @@ define i32 @test_xor_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.3: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB28_2 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB28_2
 ; CHECK-THUMB8BASE-NEXT:  .LBB28_4: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB28_1 Depth=1
@@ -6114,7 +6114,7 @@ define i32 @test_max_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB29_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB29_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB29_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB29_1 Depth=1
@@ -6323,7 +6323,7 @@ define i32 @test_min_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB30_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB30_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB30_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB30_1 Depth=1
@@ -6532,7 +6532,7 @@ define i32 @test_umax_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB31_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB31_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB31_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB31_1 Depth=1
@@ -6741,7 +6741,7 @@ define i32 @test_umin_i32() {
 ; CHECK-THUMB8BASE-NEXT:  @ %bb.5: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB32_4 Depth=2
 ; CHECK-THUMB8BASE-NEXT:    strex r2, r4, [r3]
-; CHECK-THUMB8BASE-NEXT:    cmp.w r2, #0
+; CHECK-THUMB8BASE-NEXT:    cmp r2, #0
 ; CHECK-THUMB8BASE-NEXT:    bne .LBB32_4
 ; CHECK-THUMB8BASE-NEXT:  .LBB32_6: @ %atomicrmw.start
 ; CHECK-THUMB8BASE-NEXT:    @ in Loop: Header=BB32_1 Depth=1

llvm/test/CodeGen/ARM/cmpxchg.mir

@@ -1,6 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -o - %s -mtriple=armv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s
-# RUN: llc -o - %s -mtriple=thumbv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s --check-prefix=THUMB
 ---
 name: func
 tracksRegLiveness: true
@@ -30,29 +29,6 @@ body: |
     ; CHECK-NEXT: Bcc %bb.1, 1 /* CC::ne */, killed $cpsr
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: .3:
-    ; THUMB-LABEL: name: func
-    ; THUMB: successors: %bb.1(0x80000000)
-    ; THUMB-NEXT: liveins: $r0_r1, $r4_r5, $r3, $lr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .1:
-    ; THUMB-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
-    ; THUMB-NEXT: liveins: $r4, $r5, $r3
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: $r0, $r1 = t2LDREXD $r3, 14 /* CC::al */, $noreg
-    ; THUMB-NEXT: tCMPhir killed $r0, $r4, 14 /* CC::al */, $noreg, implicit-def $cpsr
-    ; THUMB-NEXT: tCMPhir killed $r1, $r5, 0 /* CC::eq */, killed $cpsr, implicit-def $cpsr
-    ; THUMB-NEXT: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .2:
-    ; THUMB-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
-    ; THUMB-NEXT: liveins: $r4, $r5, $r3
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: early-clobber $r2 = t2STREXD $r4, $r5, $r3, 14 /* CC::al */, $noreg
-    ; THUMB-NEXT: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-    ; THUMB-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .3:
     dead early-clobber renamable $r0_r1, dead early-clobber renamable $r2 = CMP_SWAP_64 killed renamable $r3, killed renamable $r4_r5, renamable $r4_r5 :: (volatile load store monotonic monotonic (s64))
 ...
 ---
@@ -83,27 +59,5 @@ body: |
     ; CHECK-NEXT: Bcc %bb.1, 1 /* CC::ne */, killed $cpsr
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: .3:
-    ; THUMB-LABEL: name: func2
-    ; THUMB: successors: %bb.1(0x80000000)
-    ; THUMB-NEXT: liveins: $r1, $r2, $r3, $r12, $lr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .1:
-    ; THUMB-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
-    ; THUMB-NEXT: liveins: $lr, $r3, $r12
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: $r1 = t2LDREX $r3, 0, 14 /* CC::al */, $noreg
-    ; THUMB-NEXT: tCMPhir killed $r1, $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
-    ; THUMB-NEXT: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .2:
-    ; THUMB-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
-    ; THUMB-NEXT: liveins: $lr, $r3, $r12
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: early-clobber $r2 = t2STREX $lr, $r3, 0, 14 /* CC::al */, $noreg
-    ; THUMB-NEXT: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-    ; THUMB-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
-    ; THUMB-NEXT: {{  $}}
-    ; THUMB-NEXT: .3:
     dead early-clobber renamable $r1, dead early-clobber renamable $r2 = CMP_SWAP_32 killed renamable $r3, killed renamable $r12, killed renamable $lr
 ...

llvm/test/CodeGen/Thumb2/cmpxchg.mir

@@ -0,0 +1,63 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -o - %s -mtriple=thumbv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s
+---
+name: func
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $r0_r1, $r4_r5, $r3, $lr
+    ; CHECK-LABEL: name: func
+    ; CHECK: successors: %bb.1(0x80000000)
+    ; CHECK-NEXT: liveins: $r0_r1, $r4_r5, $r3, $lr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .1:
+    ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
+    ; CHECK-NEXT: liveins: $r4, $r5, $r3
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: $r0, $r1 = t2LDREXD $r3, 14 /* CC::al */, $noreg
+    ; CHECK-NEXT: tCMPhir killed $r0, $r4, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK-NEXT: tCMPhir killed $r1, $r5, 0 /* CC::eq */, killed $cpsr, implicit-def $cpsr
+    ; CHECK-NEXT: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .2:
+    ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+    ; CHECK-NEXT: liveins: $r4, $r5, $r3
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: early-clobber $r2 = t2STREXD $r4, $r5, $r3, 14 /* CC::al */, $noreg
+    ; CHECK-NEXT: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .3:
+    dead early-clobber renamable $r0_r1, dead early-clobber renamable $r2 = CMP_SWAP_64 killed renamable $r3, killed renamable $r4_r5, renamable $r4_r5 :: (volatile load store monotonic monotonic (s64))
+...
+---
+name: func2
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $r1, $r2, $r3, $r12, $lr
+    ; CHECK-LABEL: name: func2
+    ; CHECK: successors: %bb.1(0x80000000)
+    ; CHECK-NEXT: liveins: $r1, $r2, $r3, $r12, $lr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .1:
+    ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
+    ; CHECK-NEXT: liveins: $lr, $r3, $r12
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: $r1 = t2LDREX $r3, 0, 14 /* CC::al */, $noreg
+    ; CHECK-NEXT: tCMPhir killed $r1, $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK-NEXT: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .2:
+    ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+    ; CHECK-NEXT: liveins: $lr, $r3, $r12
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: early-clobber $r2 = t2STREX $lr, $r3, 0, 14 /* CC::al */, $noreg
+    ; CHECK-NEXT: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK-NEXT: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: .3:
+    dead early-clobber renamable $r1, dead early-clobber renamable $r2 = tCMP_SWAP_32 killed renamable $r3, killed renamable $r12, killed renamable $lr
+...