forked from OSchip/llvm-project
AMDGPU/SI: Fix a GPU hang with POS_W_FLOAT enabled
Reviewers: tstellarAMD, arsenm Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D16037 llvm-svn: 257625
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@ -646,8 +646,15 @@ SDValue SITargetLowering::LowerFormalArguments(
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// based on run-time states. Since we can't know what the final PSInputEna
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// will look like, so we shouldn't do anything here and the user should take
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// responsibility for the correct programming.
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//
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// Otherwise, the following restrictions apply:
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// - At least one of PERSP_* (0xF) or LINEAR_* (0x70) must be enabled.
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// - If POS_W_FLOAT (11) is enabled, at least one of PERSP_* must be
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// enabled too.
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if (Info->getShaderType() == ShaderType::PIXEL &&
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(Info->getPSInputAddr() & 0x7F) == 0) {
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((Info->getPSInputAddr() & 0x7F) == 0 ||
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((Info->getPSInputAddr() & 0xF) == 0 &&
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Info->isPSInputAllocated(11)))) {
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CCInfo.AllocateReg(AMDGPU::VGPR0);
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CCInfo.AllocateReg(AMDGPU::VGPR1);
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Info->markPSInputAllocated(0);
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@ -76,6 +76,23 @@ define float @ps_input_ena_no_inputs([9 x <16 x i8>] addrspace(2)* byval, i32 in
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}
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; GCN: .long 165580
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; GCN-NEXT: .long 2081
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; GCN-NEXT: .long 165584
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; GCN-NEXT: .long 2081
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; GCN-LABEL: {{^}}ps_input_ena_pos_w:
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; GCN-DAG: v_mov_b32_e32 v0, v4
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; GCN-DAG: v_mov_b32_e32 v1, v2
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; GCN: v_mov_b32_e32 v2, v3
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; GCN-NOT: s_endpgm
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define {float, <2 x float>} @ps_input_ena_pos_w([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 {
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%f = bitcast <2 x i32> %8 to <2 x float>
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%s = insertvalue {float, <2 x float>} undef, float %14, 0
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%s1 = insertvalue {float, <2 x float>} %s, <2 x float> %f, 1
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ret {float, <2 x float>} %s1
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}
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; GCN: .long 165580
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; GCN-NEXT: .long 562
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; GCN-NEXT: .long 165584
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