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[TableGen] Print #nnn as a name of an non-native reg unit with id nnn 

When using -debug with -gen-register-info, tablegen will crash when
trying to print a name of a non-native register unit. This patch only
affects the debug information generated while running llvm-tblgen,
and has no impact on the compilable code coming out of it.

llvm-svn: 298875
This commit is contained in:
Krzysztof Parzyszek 2017-03-27 19:08:24 +00:00
parent 9381bdf3f5
commit 46a0392c61
2 changed files with 17 additions and 6 deletions
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19
llvm/utils/TableGen/CodeGenRegisters.cpp
View File

@ -1668,7 +1668,7 @@ void CodeGenRegBank::computeRegUnitSets() {
dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name
<< ":"; << ":";
for (auto &U : RegUnitSets[USIdx].Units) for (auto &U : RegUnitSets[USIdx].Units)
dbgs() << " " << RegUnits[U].Roots[0]->getName(); printRegUnitName(U);
dbgs() << "\n"; dbgs() << "\n";
}); });
@ -1681,7 +1681,7 @@ void CodeGenRegBank::computeRegUnitSets() {
dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name
<< ":"; << ":";
for (auto &U : RegUnitSets[USIdx].Units) for (auto &U : RegUnitSets[USIdx].Units)
dbgs() << " " << RegUnits[U].Roots[0]->getName(); printRegUnitName(U);
dbgs() << "\n"; dbgs() << "\n";
} }
dbgs() << "\nUnion sets:\n"); dbgs() << "\nUnion sets:\n");
@ -1727,7 +1727,7 @@ void CodeGenRegBank::computeRegUnitSets() {
DEBUG(dbgs() << "UnitSet " << RegUnitSets.size()-1 DEBUG(dbgs() << "UnitSet " << RegUnitSets.size()-1
<< " " << RegUnitSets.back().Name << ":"; << " " << RegUnitSets.back().Name << ":";
for (auto &U : RegUnitSets.back().Units) for (auto &U : RegUnitSets.back().Units)
dbgs() << " " << RegUnits[U].Roots[0]->getName(); printRegUnitName(U);
dbgs() << "\n";); dbgs() << "\n";);
} }
} }
@ -1742,7 +1742,7 @@ void CodeGenRegBank::computeRegUnitSets() {
dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name dbgs() << "UnitSet " << USIdx << " " << RegUnitSets[USIdx].Name
<< ":"; << ":";
for (auto &U : RegUnitSets[USIdx].Units) for (auto &U : RegUnitSets[USIdx].Units)
dbgs() << " " << RegUnits[U].Roots[0]->getName(); printRegUnitName(U);
dbgs() << "\n"; dbgs() << "\n";
}); });
@ -1763,8 +1763,8 @@ void CodeGenRegBank::computeRegUnitSets() {
continue; continue;
DEBUG(dbgs() << "RC " << RC.getName() << " Units: \n"; DEBUG(dbgs() << "RC " << RC.getName() << " Units: \n";
for (auto &U : RCRegUnits) for (auto U : RCRegUnits)
dbgs() << RegUnits[U].getRoots()[0]->getName() << " "; printRegUnitName(U);
dbgs() << "\n UnitSetIDs:"); dbgs() << "\n UnitSetIDs:");
// Find all supersets. // Find all supersets.
@ -2170,3 +2170,10 @@ BitVector CodeGenRegBank::computeCoveredRegisters(ArrayRef<Record*> Regs) {
BV.set(Set[i]->EnumValue); BV.set(Set[i]->EnumValue);
return BV; return BV;
} }
void CodeGenRegBank::printRegUnitName(unsigned Unit) const {
if (Unit < NumNativeRegUnits)
dbgs() << ' ' << RegUnits[Unit].Roots[0]->getName();
else
dbgs() << " #" << Unit;
}

4
llvm/utils/TableGen/CodeGenRegisters.h
View File

@ -735,6 +735,10 @@ namespace llvm {
// LaneMask is contained in CoveringLanes will be completely covered by // LaneMask is contained in CoveringLanes will be completely covered by
// another sub-register with the same or larger lane mask. // another sub-register with the same or larger lane mask.
LaneBitmask CoveringLanes; LaneBitmask CoveringLanes;
// Helper function for printing debug information. Handles artificial
// (non-native) reg units.
void printRegUnitName(unsigned Unit) const;
}; };
} // end namespace llvm } // end namespace llvm