forked from OSchip/llvm-project
[mips] Fold MipsTargetInfoBase subclasses into MipsTargetInfoBase and rename to MipsTargetInfo. NFC
Summary: This unifies mips/mipsel and mips64/mips64el into a single class so that we can later support O32 on mips64/mips64el and N32/N64 on mips/mipsel (when an appropriate CPU selected). Reviewers: atanasyan Subscribers: atanasyan, jfb, cfe-commits, dschuff Differential Revision: http://reviews.llvm.org/D20678 llvm-svn: 270984
This commit is contained in:
parent
8b61fd41cd
commit
4672af6fec
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@ -7006,8 +7006,29 @@ public:
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}
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};
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class MipsTargetInfoBase : public TargetInfo {
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virtual void setDataLayout() = 0;
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class MipsTargetInfo : public TargetInfo {
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void setDataLayout() {
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if (BigEndian) {
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if (ABI == "o32" || ABI == "eabi")
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resetDataLayout("E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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else if (ABI == "n32")
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resetDataLayout("E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128");
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else if (ABI == "n64")
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resetDataLayout("E-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128");
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else
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llvm_unreachable("Invalid ABI");
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} else {
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if (ABI == "o32" || ABI == "eabi")
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resetDataLayout("e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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else if (ABI == "n32")
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resetDataLayout("e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128");
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else if (ABI == "n64")
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resetDataLayout("e-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128");
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else
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llvm_unreachable("Invalid ABI");
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}
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}
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static const Builtin::Info BuiltinInfo[];
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std::string CPU;
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@ -7028,12 +7049,39 @@ protected:
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std::string ABI;
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public:
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MipsTargetInfoBase(const llvm::Triple &Triple, const TargetOptions &,
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const std::string &ABIStr, const std::string &CPUStr)
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: TargetInfo(Triple), CPU(CPUStr), IsMips16(false), IsMicromips(false),
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IsNan2008(false), IsSingleFloat(false), FloatABI(HardFloat),
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DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {
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MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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: TargetInfo(Triple), CPU((getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel)
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? "mips32r2"
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: "mips64r2"),
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IsMips16(false), IsMicromips(false), IsNan2008(false),
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IsSingleFloat(false), FloatABI(HardFloat), DspRev(NoDSP), HasMSA(false),
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HasFP64(false), ABI((getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel)
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? "o32"
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: "n64") {
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TheCXXABI.set(TargetCXXABI::GenericMIPS);
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BigEndian = getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mips64;
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if (getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel) {
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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Int64Type = SignedLongLong;
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IntMaxType = Int64Type;
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MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
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} else {
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LongDoubleWidth = LongDoubleAlign = 128;
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LongDoubleFormat = &llvm::APFloat::IEEEquad;
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if (getTriple().getOS() == llvm::Triple::FreeBSD) {
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LongDoubleWidth = LongDoubleAlign = 64;
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LongDoubleFormat = &llvm::APFloat::IEEEdouble;
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}
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setN64ABITypes();
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SuitableAlign = 128;
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MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
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}
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}
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bool isNaN2008Default() const {
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@ -7049,6 +7097,48 @@ public:
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}
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StringRef getABI() const override { return ABI; }
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bool setABI(const std::string &Name) override {
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if (getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel) {
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if (Name == "o32" || Name == "eabi") {
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ABI = Name;
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return true;
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}
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}
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if (getTriple().getArch() == llvm::Triple::mips64 ||
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getTriple().getArch() == llvm::Triple::mips64el) {
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if (Name == "n32") {
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setN32ABITypes();
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ABI = Name;
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return true;
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}
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if (Name == "n64") {
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setN64ABITypes();
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ABI = Name;
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return true;
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}
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}
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return false;
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}
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void setN64ABITypes() {
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LongWidth = LongAlign = 64;
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PointerWidth = PointerAlign = 64;
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SizeType = UnsignedLong;
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PtrDiffType = SignedLong;
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Int64Type = SignedLong;
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IntMaxType = Int64Type;
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}
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void setN32ABITypes() {
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LongWidth = LongAlign = 32;
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PointerWidth = PointerAlign = 32;
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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Int64Type = SignedLongLong;
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IntMaxType = Int64Type;
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}
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bool setCPU(const std::string &Name) override {
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bool IsMips32 = getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel;
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@ -7089,11 +7179,57 @@ public:
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override {
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if (BigEndian) {
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DefineStd(Builder, "MIPSEB", Opts);
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Builder.defineMacro("_MIPSEB");
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} else {
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DefineStd(Builder, "MIPSEL", Opts);
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Builder.defineMacro("_MIPSEL");
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}
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Builder.defineMacro("__mips__");
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Builder.defineMacro("_mips");
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if (Opts.GNUMode)
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Builder.defineMacro("mips");
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if (getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel) {
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Builder.defineMacro("__mips", "32");
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Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
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} else {
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Builder.defineMacro("__mips", "64");
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Builder.defineMacro("__mips64");
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Builder.defineMacro("__mips64__");
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Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
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}
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const std::string ISARev = llvm::StringSwitch<std::string>(getCPU())
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.Cases("mips32", "mips64", "1")
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.Cases("mips32r2", "mips64r2", "2")
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.Cases("mips32r3", "mips64r3", "3")
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.Cases("mips32r5", "mips64r5", "5")
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.Cases("mips32r6", "mips64r6", "6")
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.Default("");
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if (!ISARev.empty())
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Builder.defineMacro("__mips_isa_rev", ISARev);
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if (ABI == "o32") {
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Builder.defineMacro("__mips_o32");
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Builder.defineMacro("_ABIO32", "1");
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Builder.defineMacro("_MIPS_SIM", "_ABIO32");
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} else if (ABI == "eabi")
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Builder.defineMacro("__mips_eabi");
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else if (ABI == "n32") {
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Builder.defineMacro("__mips_n32");
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Builder.defineMacro("_ABIN32", "2");
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Builder.defineMacro("_MIPS_SIM", "_ABIN32");
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} else if (ABI == "n64") {
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Builder.defineMacro("__mips_n64");
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Builder.defineMacro("_ABI64", "3");
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Builder.defineMacro("_MIPS_SIM", "_ABI64");
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} else
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llvm_unreachable("Invalid ABI.");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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switch (FloatABI) {
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@ -7150,6 +7286,9 @@ public:
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
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if (getTriple().getArch() == llvm::Triple::mips64 ||
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getTriple().getArch() == llvm::Triple::mips64el)
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
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}
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ArrayRef<Builtin::Info> getTargetBuiltins() const override {
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@ -7193,7 +7332,6 @@ public:
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};
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return llvm::makeArrayRef(GCCRegNames);
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override = 0;
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const override {
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switch (*Name) {
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@ -7316,9 +7454,45 @@ public:
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}
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bool isCLZForZeroUndef() const override { return false; }
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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static const TargetInfo::GCCRegAlias O32RegAliases[] = {
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{{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
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{{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
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{{"a3"}, "$7"}, {{"t0"}, "$8"}, {{"t1"}, "$9"},
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{{"t2"}, "$10"}, {{"t3"}, "$11"}, {{"t4"}, "$12"},
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{{"t5"}, "$13"}, {{"t6"}, "$14"}, {{"t7"}, "$15"},
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{{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
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{{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
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{{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
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{{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
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{{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
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{{"ra"}, "$31"}};
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static const TargetInfo::GCCRegAlias NewABIRegAliases[] = {
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{{"at"}, "$1"}, {{"v0"}, "$2"}, {{"v1"}, "$3"},
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{{"a0"}, "$4"}, {{"a1"}, "$5"}, {{"a2"}, "$6"},
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{{"a3"}, "$7"}, {{"a4"}, "$8"}, {{"a5"}, "$9"},
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{{"a6"}, "$10"}, {{"a7"}, "$11"}, {{"t0"}, "$12"},
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{{"t1"}, "$13"}, {{"t2"}, "$14"}, {{"t3"}, "$15"},
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{{"s0"}, "$16"}, {{"s1"}, "$17"}, {{"s2"}, "$18"},
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{{"s3"}, "$19"}, {{"s4"}, "$20"}, {{"s5"}, "$21"},
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{{"s6"}, "$22"}, {{"s7"}, "$23"}, {{"t8"}, "$24"},
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{{"t9"}, "$25"}, {{"k0"}, "$26"}, {{"k1"}, "$27"},
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{{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
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{{"ra"}, "$31"}};
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if (getTriple().getArch() == llvm::Triple::mips ||
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getTriple().getArch() == llvm::Triple::mipsel)
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return llvm::makeArrayRef(O32RegAliases);
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return llvm::makeArrayRef(NewABIRegAliases);
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}
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bool hasInt128Type() const override {
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return getTriple().getArch() == llvm::Triple::mips64 ||
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getTriple().getArch() == llvm::Triple::mips64el;
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}
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};
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const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
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const Builtin::Info MipsTargetInfo::BuiltinInfo[] = {
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#define BUILTIN(ID, TYPE, ATTRS) \
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{ #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
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#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
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@ -7326,288 +7500,6 @@ const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
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#include "clang/Basic/BuiltinsMips.def"
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};
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class Mips32TargetInfoBase : public MipsTargetInfoBase {
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public:
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Mips32TargetInfoBase(const llvm::Triple &Triple, const TargetOptions &Opts)
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: MipsTargetInfoBase(Triple, Opts, "o32", "mips32r2") {
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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Int64Type = SignedLongLong;
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IntMaxType = Int64Type;
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MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
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}
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bool setABI(const std::string &Name) override {
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if (Name == "o32" || Name == "eabi") {
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ABI = Name;
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return true;
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}
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return false;
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override {
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MipsTargetInfoBase::getTargetDefines(Opts, Builder);
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Builder.defineMacro("__mips", "32");
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Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
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const std::string& CPUStr = getCPU();
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if (CPUStr == "mips32")
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Builder.defineMacro("__mips_isa_rev", "1");
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else if (CPUStr == "mips32r2")
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Builder.defineMacro("__mips_isa_rev", "2");
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else if (CPUStr == "mips32r3")
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Builder.defineMacro("__mips_isa_rev", "3");
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else if (CPUStr == "mips32r5")
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Builder.defineMacro("__mips_isa_rev", "5");
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else if (CPUStr == "mips32r6")
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Builder.defineMacro("__mips_isa_rev", "6");
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if (ABI == "o32") {
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Builder.defineMacro("__mips_o32");
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Builder.defineMacro("_ABIO32", "1");
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Builder.defineMacro("_MIPS_SIM", "_ABIO32");
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}
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else if (ABI == "eabi")
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Builder.defineMacro("__mips_eabi");
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else
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llvm_unreachable("Invalid ABI for Mips32.");
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
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{ { "at" }, "$1" },
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{ { "v0" }, "$2" },
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{ { "v1" }, "$3" },
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{ { "a0" }, "$4" },
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{ { "a1" }, "$5" },
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{ { "a2" }, "$6" },
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{ { "a3" }, "$7" },
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{ { "t0" }, "$8" },
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{ { "t1" }, "$9" },
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{ { "t2" }, "$10" },
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{ { "t3" }, "$11" },
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{ { "t4" }, "$12" },
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{ { "t5" }, "$13" },
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{ { "t6" }, "$14" },
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{ { "t7" }, "$15" },
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{ { "s0" }, "$16" },
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{ { "s1" }, "$17" },
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{ { "s2" }, "$18" },
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{ { "s3" }, "$19" },
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{ { "s4" }, "$20" },
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{ { "s5" }, "$21" },
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{ { "s6" }, "$22" },
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{ { "s7" }, "$23" },
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{ { "t8" }, "$24" },
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{ { "t9" }, "$25" },
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{ { "k0" }, "$26" },
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{ { "k1" }, "$27" },
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{ { "gp" }, "$28" },
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{ { "sp","$sp" }, "$29" },
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{ { "fp","$fp" }, "$30" },
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{ { "ra" }, "$31" }
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};
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return llvm::makeArrayRef(GCCRegAliases);
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}
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};
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class Mips32EBTargetInfo : public Mips32TargetInfoBase {
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void setDataLayout() override {
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resetDataLayout("E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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}
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public:
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Mips32EBTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
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: Mips32TargetInfoBase(Triple, Opts) {
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override {
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DefineStd(Builder, "MIPSEB", Opts);
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Builder.defineMacro("_MIPSEB");
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Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
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}
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};
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class Mips32ELTargetInfo : public Mips32TargetInfoBase {
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void setDataLayout() override {
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resetDataLayout("e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
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}
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public:
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Mips32ELTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
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: Mips32TargetInfoBase(Triple, Opts) {
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BigEndian = false;
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override {
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DefineStd(Builder, "MIPSEL", Opts);
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Builder.defineMacro("_MIPSEL");
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Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
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}
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};
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class Mips64TargetInfoBase : public MipsTargetInfoBase {
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public:
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Mips64TargetInfoBase(const llvm::Triple &Triple, const TargetOptions &Opts)
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: MipsTargetInfoBase(Triple, Opts, "n64", "mips64r2") {
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LongDoubleWidth = LongDoubleAlign = 128;
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LongDoubleFormat = &llvm::APFloat::IEEEquad;
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if (getTriple().getOS() == llvm::Triple::FreeBSD) {
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LongDoubleWidth = LongDoubleAlign = 64;
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LongDoubleFormat = &llvm::APFloat::IEEEdouble;
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}
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setN64ABITypes();
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SuitableAlign = 128;
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MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
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}
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void setN64ABITypes() {
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LongWidth = LongAlign = 64;
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PointerWidth = PointerAlign = 64;
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SizeType = UnsignedLong;
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PtrDiffType = SignedLong;
|
||||
Int64Type = SignedLong;
|
||||
IntMaxType = Int64Type;
|
||||
}
|
||||
|
||||
void setN32ABITypes() {
|
||||
LongWidth = LongAlign = 32;
|
||||
PointerWidth = PointerAlign = 32;
|
||||
SizeType = UnsignedInt;
|
||||
PtrDiffType = SignedInt;
|
||||
Int64Type = SignedLongLong;
|
||||
IntMaxType = Int64Type;
|
||||
}
|
||||
|
||||
bool setABI(const std::string &Name) override {
|
||||
if (Name == "n32") {
|
||||
setN32ABITypes();
|
||||
ABI = Name;
|
||||
return true;
|
||||
}
|
||||
if (Name == "n64") {
|
||||
setN64ABITypes();
|
||||
ABI = Name;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
void getTargetDefines(const LangOptions &Opts,
|
||||
MacroBuilder &Builder) const override {
|
||||
MipsTargetInfoBase::getTargetDefines(Opts, Builder);
|
||||
|
||||
Builder.defineMacro("__mips", "64");
|
||||
Builder.defineMacro("__mips64");
|
||||
Builder.defineMacro("__mips64__");
|
||||
Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
|
||||
|
||||
const std::string& CPUStr = getCPU();
|
||||
if (CPUStr == "mips64")
|
||||
Builder.defineMacro("__mips_isa_rev", "1");
|
||||
else if (CPUStr == "mips64r2")
|
||||
Builder.defineMacro("__mips_isa_rev", "2");
|
||||
else if (CPUStr == "mips64r3")
|
||||
Builder.defineMacro("__mips_isa_rev", "3");
|
||||
else if (CPUStr == "mips64r5")
|
||||
Builder.defineMacro("__mips_isa_rev", "5");
|
||||
else if (CPUStr == "mips64r6")
|
||||
Builder.defineMacro("__mips_isa_rev", "6");
|
||||
|
||||
if (ABI == "n32") {
|
||||
Builder.defineMacro("__mips_n32");
|
||||
Builder.defineMacro("_ABIN32", "2");
|
||||
Builder.defineMacro("_MIPS_SIM", "_ABIN32");
|
||||
}
|
||||
else if (ABI == "n64") {
|
||||
Builder.defineMacro("__mips_n64");
|
||||
Builder.defineMacro("_ABI64", "3");
|
||||
Builder.defineMacro("_MIPS_SIM", "_ABI64");
|
||||
}
|
||||
else
|
||||
llvm_unreachable("Invalid ABI for Mips64.");
|
||||
|
||||
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
|
||||
}
|
||||
ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
|
||||
static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
|
||||
{ { "at" }, "$1" },
|
||||
{ { "v0" }, "$2" },
|
||||
{ { "v1" }, "$3" },
|
||||
{ { "a0" }, "$4" },
|
||||
{ { "a1" }, "$5" },
|
||||
{ { "a2" }, "$6" },
|
||||
{ { "a3" }, "$7" },
|
||||
{ { "a4" }, "$8" },
|
||||
{ { "a5" }, "$9" },
|
||||
{ { "a6" }, "$10" },
|
||||
{ { "a7" }, "$11" },
|
||||
{ { "t0" }, "$12" },
|
||||
{ { "t1" }, "$13" },
|
||||
{ { "t2" }, "$14" },
|
||||
{ { "t3" }, "$15" },
|
||||
{ { "s0" }, "$16" },
|
||||
{ { "s1" }, "$17" },
|
||||
{ { "s2" }, "$18" },
|
||||
{ { "s3" }, "$19" },
|
||||
{ { "s4" }, "$20" },
|
||||
{ { "s5" }, "$21" },
|
||||
{ { "s6" }, "$22" },
|
||||
{ { "s7" }, "$23" },
|
||||
{ { "t8" }, "$24" },
|
||||
{ { "t9" }, "$25" },
|
||||
{ { "k0" }, "$26" },
|
||||
{ { "k1" }, "$27" },
|
||||
{ { "gp" }, "$28" },
|
||||
{ { "sp","$sp" }, "$29" },
|
||||
{ { "fp","$fp" }, "$30" },
|
||||
{ { "ra" }, "$31" }
|
||||
};
|
||||
return llvm::makeArrayRef(GCCRegAliases);
|
||||
}
|
||||
|
||||
bool hasInt128Type() const override { return true; }
|
||||
};
|
||||
|
||||
class Mips64EBTargetInfo : public Mips64TargetInfoBase {
|
||||
void setDataLayout() override {
|
||||
if (ABI == "n32")
|
||||
resetDataLayout("E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128");
|
||||
else
|
||||
resetDataLayout("E-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128");
|
||||
}
|
||||
|
||||
public:
|
||||
Mips64EBTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
|
||||
: Mips64TargetInfoBase(Triple, Opts) {}
|
||||
void getTargetDefines(const LangOptions &Opts,
|
||||
MacroBuilder &Builder) const override {
|
||||
DefineStd(Builder, "MIPSEB", Opts);
|
||||
Builder.defineMacro("_MIPSEB");
|
||||
Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
|
||||
}
|
||||
};
|
||||
|
||||
class Mips64ELTargetInfo : public Mips64TargetInfoBase {
|
||||
void setDataLayout() override {
|
||||
if (ABI == "n32")
|
||||
resetDataLayout("e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128");
|
||||
else
|
||||
resetDataLayout("e-m:m-i8:8:32-i16:16:32-i64:64-n32:64-S128");
|
||||
}
|
||||
public:
|
||||
Mips64ELTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
|
||||
: Mips64TargetInfoBase(Triple, Opts) {
|
||||
// Default ABI is n64.
|
||||
BigEndian = false;
|
||||
}
|
||||
void getTargetDefines(const LangOptions &Opts,
|
||||
MacroBuilder &Builder) const override {
|
||||
DefineStd(Builder, "MIPSEL", Opts);
|
||||
Builder.defineMacro("_MIPSEL");
|
||||
Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
|
||||
}
|
||||
};
|
||||
|
||||
class PNaClTargetInfo : public TargetInfo {
|
||||
public:
|
||||
PNaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
|
||||
|
@ -7664,10 +7556,10 @@ ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
|
|||
}
|
||||
|
||||
// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
|
||||
class NaClMips32ELTargetInfo : public Mips32ELTargetInfo {
|
||||
class NaClMips32TargetInfo : public MipsTargetInfo {
|
||||
public:
|
||||
NaClMips32ELTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
|
||||
: Mips32ELTargetInfo(Triple, Opts) {}
|
||||
NaClMips32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
|
||||
: MipsTargetInfo(Triple, Opts) {}
|
||||
|
||||
BuiltinVaListKind getBuiltinVaListKind() const override {
|
||||
return TargetInfo::PNaClABIBuiltinVaList;
|
||||
|
@ -8175,63 +8067,63 @@ static TargetInfo *AllocateTarget(const llvm::Triple &Triple,
|
|||
case llvm::Triple::mips:
|
||||
switch (os) {
|
||||
case llvm::Triple::Linux:
|
||||
return new LinuxTargetInfo<Mips32EBTargetInfo>(Triple, Opts);
|
||||
return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::RTEMS:
|
||||
return new RTEMSTargetInfo<Mips32EBTargetInfo>(Triple, Opts);
|
||||
return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::FreeBSD:
|
||||
return new FreeBSDTargetInfo<Mips32EBTargetInfo>(Triple, Opts);
|
||||
return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::NetBSD:
|
||||
return new NetBSDTargetInfo<Mips32EBTargetInfo>(Triple, Opts);
|
||||
return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
default:
|
||||
return new Mips32EBTargetInfo(Triple, Opts);
|
||||
return new MipsTargetInfo(Triple, Opts);
|
||||
}
|
||||
|
||||
case llvm::Triple::mipsel:
|
||||
switch (os) {
|
||||
case llvm::Triple::Linux:
|
||||
return new LinuxTargetInfo<Mips32ELTargetInfo>(Triple, Opts);
|
||||
return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::RTEMS:
|
||||
return new RTEMSTargetInfo<Mips32ELTargetInfo>(Triple, Opts);
|
||||
return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::FreeBSD:
|
||||
return new FreeBSDTargetInfo<Mips32ELTargetInfo>(Triple, Opts);
|
||||
return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::NetBSD:
|
||||
return new NetBSDTargetInfo<Mips32ELTargetInfo>(Triple, Opts);
|
||||
return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::NaCl:
|
||||
return new NaClTargetInfo<NaClMips32ELTargetInfo>(Triple, Opts);
|
||||
return new NaClTargetInfo<NaClMips32TargetInfo>(Triple, Opts);
|
||||
default:
|
||||
return new Mips32ELTargetInfo(Triple, Opts);
|
||||
return new MipsTargetInfo(Triple, Opts);
|
||||
}
|
||||
|
||||
case llvm::Triple::mips64:
|
||||
switch (os) {
|
||||
case llvm::Triple::Linux:
|
||||
return new LinuxTargetInfo<Mips64EBTargetInfo>(Triple, Opts);
|
||||
return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::RTEMS:
|
||||
return new RTEMSTargetInfo<Mips64EBTargetInfo>(Triple, Opts);
|
||||
return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::FreeBSD:
|
||||
return new FreeBSDTargetInfo<Mips64EBTargetInfo>(Triple, Opts);
|
||||
return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::NetBSD:
|
||||
return new NetBSDTargetInfo<Mips64EBTargetInfo>(Triple, Opts);
|
||||
return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::OpenBSD:
|
||||
return new OpenBSDTargetInfo<Mips64EBTargetInfo>(Triple, Opts);
|
||||
return new OpenBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
default:
|
||||
return new Mips64EBTargetInfo(Triple, Opts);
|
||||
return new MipsTargetInfo(Triple, Opts);
|
||||
}
|
||||
|
||||
case llvm::Triple::mips64el:
|
||||
switch (os) {
|
||||
case llvm::Triple::Linux:
|
||||
return new LinuxTargetInfo<Mips64ELTargetInfo>(Triple, Opts);
|
||||
return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::RTEMS:
|
||||
return new RTEMSTargetInfo<Mips64ELTargetInfo>(Triple, Opts);
|
||||
return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::FreeBSD:
|
||||
return new FreeBSDTargetInfo<Mips64ELTargetInfo>(Triple, Opts);
|
||||
return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::NetBSD:
|
||||
return new NetBSDTargetInfo<Mips64ELTargetInfo>(Triple, Opts);
|
||||
return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
case llvm::Triple::OpenBSD:
|
||||
return new OpenBSDTargetInfo<Mips64ELTargetInfo>(Triple, Opts);
|
||||
return new OpenBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
|
||||
default:
|
||||
return new Mips64ELTargetInfo(Triple, Opts);
|
||||
return new MipsTargetInfo(Triple, Opts);
|
||||
}
|
||||
|
||||
case llvm::Triple::le32:
|
||||
|
|
Loading…
Reference in New Issue