forked from OSchip/llvm-project
[MCJIT] Take the relocation addend into account when applying ARM MachO VANILLA
and BR24 relocations. <rdar://problem/18296496> llvm-svn: 217605
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@ -101,12 +101,13 @@ public:
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default:
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default:
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llvm_unreachable("Invalid relocation type!");
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llvm_unreachable("Invalid relocation type!");
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case MachO::ARM_RELOC_VANILLA:
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case MachO::ARM_RELOC_VANILLA:
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writeBytesUnaligned(Value, LocalAddress, 1 << RE.Size);
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writeBytesUnaligned(Value + RE.Addend, LocalAddress, 1 << RE.Size);
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break;
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break;
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case MachO::ARM_RELOC_BR24: {
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case MachO::ARM_RELOC_BR24: {
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// Mask the value into the target address. We know instructions are
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// Mask the value into the target address. We know instructions are
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// 32-bit aligned, so we can do it all at once.
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// 32-bit aligned, so we can do it all at once.
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uint32_t *p = (uint32_t *)LocalAddress;
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uint32_t *p = (uint32_t *)LocalAddress;
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Value += RE.Addend;
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// The low two bits of the value are not encoded.
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// The low two bits of the value are not encoded.
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Value >>= 2;
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Value >>= 2;
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// Mask the value to 24 bits.
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// Mask the value to 24 bits.
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@ -34,6 +34,9 @@ insn3:
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foo:
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foo:
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bx lr
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bx lr
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# Add 'aaa' to the common symbols to make sure 'baz' isn't at the start of the
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# section. This ensures that we test VANILLA relocation addends correctly.
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.comm aaa, 4, 2
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.comm baz, 4, 2
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.comm baz, 4, 2
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.subsections_via_symbols
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.subsections_via_symbols
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