[x86] NFC - normalize test case formatting of IR and generate CHECK

lines with the script rather than using manually written checks.

llvm-svn: 311753
This commit is contained in:
Chandler Carruth 2017-08-25 02:32:51 +00:00
parent 5c69dac589
commit 46259260c7
3 changed files with 647 additions and 206 deletions

View File

@ -1,31 +1,111 @@
; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mcpu=generic -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,X64-LINUX
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s --check-prefixes=X64,X64-WIN32
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
; The immediate can be encoded in a smaller way if the
; instruction is a sub instead of an add.
define i32 @test1(i32 inreg %a) nounwind {
; X32-LABEL: test1:
; X32: # BB#0: # %entry
; X32-NEXT: subl $-128, %eax
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test1:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subl $-128, %edi
; X64-LINUX-NEXT: movl %edi, %eax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test1:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subl $-128, %ecx
; X64-WIN32-NEXT: movl %ecx, %eax
; X64-WIN32-NEXT: retq
entry:
%b = add i32 %a, 128
ret i32 %b
; X32: subl $-128, %eax
; X64: subl $-128,
}
define i64 @test2(i64 inreg %a) nounwind {
; X32-LABEL: test2:
; X32: # BB#0: # %entry
; X32-NEXT: addl $-2147483648, %eax # imm = 0x80000000
; X32-NEXT: adcl $0, %edx
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test2:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subq $-2147483648, %rdi # imm = 0x80000000
; X64-LINUX-NEXT: movq %rdi, %rax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test2:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subq $-2147483648, %rcx # imm = 0x80000000
; X64-WIN32-NEXT: movq %rcx, %rax
; X64-WIN32-NEXT: retq
entry:
%b = add i64 %a, 2147483648
ret i64 %b
; X32: addl $-2147483648, %eax
; X64: subq $-2147483648,
}
define i64 @test3(i64 inreg %a) nounwind {
; X32-LABEL: test3:
; X32: # BB#0: # %entry
; X32-NEXT: addl $128, %eax
; X32-NEXT: adcl $0, %edx
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test3:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subq $-128, %rdi
; X64-LINUX-NEXT: movq %rdi, %rax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test3:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subq $-128, %rcx
; X64-WIN32-NEXT: movq %rcx, %rax
; X64-WIN32-NEXT: retq
entry:
%b = add i64 %a, 128
ret i64 %b
; X32: addl $128, %eax
; X64: subq $-128,
}
define i1 @test4(i32 %v1, i32 %v2, i32* %X) nounwind {
; X32-LABEL: test4:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: jo .LBB3_2
; X32-NEXT: # BB#1: # %normal
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl $0, (%eax)
; X32-NEXT: .LBB3_2: # %overflow
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test4:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: addl %esi, %edi
; X64-LINUX-NEXT: jo .LBB3_2
; X64-LINUX-NEXT: # BB#1: # %normal
; X64-LINUX-NEXT: movl $0, (%rdx)
; X64-LINUX-NEXT: .LBB3_2: # %overflow
; X64-LINUX-NEXT: xorl %eax, %eax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test4:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: addl %edx, %ecx
; X64-WIN32-NEXT: jo .LBB3_2
; X64-WIN32-NEXT: # BB#1: # %normal
; X64-WIN32-NEXT: movl $0, (%r8)
; X64-WIN32-NEXT: .LBB3_2: # %overflow
; X64-WIN32-NEXT: xorl %eax, %eax
; X64-WIN32-NEXT: retq
entry:
%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
%sum = extractvalue {i32, i1} %t, 0
@ -38,17 +118,40 @@ normal:
overflow:
ret i1 false
; X32-LABEL: test4:
; X32: addl
; X32-NEXT: jo
; X64-LABEL: test4:
; X64: addl %e[[A1:si|dx]], %e[[A0:di|cx]]
; X64-NEXT: jo
}
define i1 @test5(i32 %v1, i32 %v2, i32* %X) nounwind {
; X32-LABEL: test5:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: jb .LBB4_2
; X32-NEXT: # BB#1: # %normal
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl $0, (%eax)
; X32-NEXT: .LBB4_2: # %carry
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test5:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: addl %esi, %edi
; X64-LINUX-NEXT: jb .LBB4_2
; X64-LINUX-NEXT: # BB#1: # %normal
; X64-LINUX-NEXT: movl $0, (%rdx)
; X64-LINUX-NEXT: .LBB4_2: # %carry
; X64-LINUX-NEXT: xorl %eax, %eax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test5:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: addl %edx, %ecx
; X64-WIN32-NEXT: jb .LBB4_2
; X64-WIN32-NEXT: # BB#1: # %normal
; X64-WIN32-NEXT: movl $0, (%r8)
; X64-WIN32-NEXT: .LBB4_2: # %carry
; X64-WIN32-NEXT: xorl %eax, %eax
; X64-WIN32-NEXT: retq
entry:
%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
%sum = extractvalue {i32, i1} %t, 0
@ -61,126 +164,225 @@ normal:
carry:
ret i1 false
; X32-LABEL: test5:
; X32: addl
; X32-NEXT: jb
; X64-LABEL: test5:
; X64: addl %e[[A1]], %e[[A0]]
; X64-NEXT: jb
}
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
define i64 @test6(i64 %A, i32 %B) nounwind {
%tmp12 = zext i32 %B to i64 ; <i64> [#uses=1]
%tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1]
%tmp5 = add i64 %tmp3, %A ; <i64> [#uses=1]
ret i64 %tmp5
; X32-LABEL: test6:
; X32: movl 4(%esp), %eax
; X32-NEXT: movl 12(%esp), %edx
; X32-NEXT: addl 8(%esp), %edx
; X32-NEXT: ret
; X64-LABEL: test6:
; X64: shlq $32, %r[[A1]]
; X64: leaq (%r[[A1]],%r[[A0]]), %rax
; X64: ret
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test6:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; X64-LINUX-NEXT: shlq $32, %rsi
; X64-LINUX-NEXT: leaq (%rsi,%rdi), %rax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test6:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
; X64-WIN32-NEXT: shlq $32, %rdx
; X64-WIN32-NEXT: leaq (%rdx,%rcx), %rax
; X64-WIN32-NEXT: retq
entry:
%tmp12 = zext i32 %B to i64
%tmp3 = shl i64 %tmp12, 32
%tmp5 = add i64 %tmp3, %A
ret i64 %tmp5
}
define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind {
%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
ret {i32, i1} %t
; X32-LABEL: test7:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: setb %dl
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test7:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: addl %esi, %edi
; X64-LINUX-NEXT: setb %dl
; X64-LINUX-NEXT: movl %edi, %eax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test7:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: addl %edx, %ecx
; X64-WIN32-NEXT: setb %dl
; X64-WIN32-NEXT: movl %ecx, %eax
; X64-WIN32-NEXT: retq
entry:
%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
ret {i32, i1} %t
}
; X64-LABEL: test7:
; X64: addl %e[[A1]], %e
; X64-NEXT: setb %dl
; X64: ret
; PR5443
define {i64, i1} @test8(i64 %left, i64 %right) nounwind {
; X32-LABEL: test8:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X32-NEXT: setb %cl
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test8:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: addq %rsi, %rdi
; X64-LINUX-NEXT: setb %dl
; X64-LINUX-NEXT: movq %rdi, %rax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test8:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: addq %rdx, %rcx
; X64-WIN32-NEXT: setb %dl
; X64-WIN32-NEXT: movq %rcx, %rax
; X64-WIN32-NEXT: retq
entry:
%extleft = zext i64 %left to i65
%extright = zext i64 %right to i65
%sum = add i65 %extleft, %extright
%res.0 = trunc i65 %sum to i64
%overflow = and i65 %sum, -18446744073709551616
%res.1 = icmp ne i65 %overflow, 0
%final0 = insertvalue {i64, i1} undef, i64 %res.0, 0
%final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1
ret {i64, i1} %final1
%extleft = zext i64 %left to i65
%extright = zext i64 %right to i65
%sum = add i65 %extleft, %extright
%res.0 = trunc i65 %sum to i64
%overflow = and i65 %sum, -18446744073709551616
%res.1 = icmp ne i65 %overflow, 0
%final0 = insertvalue {i64, i1} undef, i64 %res.0, 0
%final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1
ret {i64, i1} %final1
}
; X64-LABEL: test8:
; X64: addq
; X64-NEXT: setb
; X64: ret
define i32 @test9(i32 %x, i32 %y) nounwind readnone {
; X32-LABEL: test9:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: xorl %ecx, %ecx
; X32-NEXT: cmpl $10, {{[0-9]+}}(%esp)
; X32-NEXT: sete %cl
; X32-NEXT: subl %ecx, %eax
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test9:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: xorl %eax, %eax
; X64-LINUX-NEXT: cmpl $10, %edi
; X64-LINUX-NEXT: sete %al
; X64-LINUX-NEXT: subl %eax, %esi
; X64-LINUX-NEXT: movl %esi, %eax
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test9:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: xorl %eax, %eax
; X64-WIN32-NEXT: cmpl $10, %ecx
; X64-WIN32-NEXT: sete %al
; X64-WIN32-NEXT: subl %eax, %edx
; X64-WIN32-NEXT: movl %edx, %eax
; X64-WIN32-NEXT: retq
entry:
%cmp = icmp eq i32 %x, 10
%sub = sext i1 %cmp to i32
%cond = add i32 %sub, %y
ret i32 %cond
; X64-LABEL: test9:
; X64: cmpl $10
; X64: sete
; X64: subl
; X64: ret
}
define i1 @test10(i32 %x) nounwind {
; X32-LABEL: test10:
; X32: # BB#0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: incl %eax
; X32-NEXT: seto %al
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test10:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: incl %edi
; X64-LINUX-NEXT: seto %al
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test10:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: incl %ecx
; X64-WIN32-NEXT: seto %al
; X64-WIN32-NEXT: retq
entry:
%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %x, i32 1)
%obit = extractvalue {i32, i1} %t, 1
ret i1 %obit
; X32-LABEL: test10:
; X32: incl
; X32-NEXT: seto
; X64-LABEL: test10:
; X64: incl
; X64-NEXT: seto
}
define void @test11(i32* inreg %a) nounwind {
; X32-LABEL: test11:
; X32: # BB#0: # %entry
; X32-NEXT: subl $-128, (%eax)
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test11:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subl $-128, (%rdi)
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test11:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subl $-128, (%rcx)
; X64-WIN32-NEXT: retq
entry:
%aa = load i32, i32* %a
%b = add i32 %aa, 128
store i32 %b, i32* %a
ret void
; X32-LABEL: test11:
; X32: subl $-128, (%
; X64-LABEL: test11:
; X64: subl $-128, (%
}
define void @test12(i64* inreg %a) nounwind {
; X32-LABEL: test12:
; X32: # BB#0: # %entry
; X32-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X32-NEXT: addl (%eax), %ecx
; X32-NEXT: adcl $0, 4(%eax)
; X32-NEXT: movl %ecx, (%eax)
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test12:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subq $-2147483648, (%rdi) # imm = 0x80000000
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test12:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subq $-2147483648, (%rcx) # imm = 0x80000000
; X64-WIN32-NEXT: retq
entry:
%aa = load i64, i64* %a
%b = add i64 %aa, 2147483648
store i64 %b, i64* %a
ret void
; X32-LABEL: test12:
; X32: addl (%
; X32-NEXT: adcl $0,
; X64-LABEL: test12:
; X64: subq $-2147483648, (%
}
define void @test13(i64* inreg %a) nounwind {
; X32-LABEL: test13:
; X32: # BB#0: # %entry
; X32-NEXT: movl $128, %ecx
; X32-NEXT: addl (%eax), %ecx
; X32-NEXT: adcl $0, 4(%eax)
; X32-NEXT: movl %ecx, (%eax)
; X32-NEXT: retl
;
; X64-LINUX-LABEL: test13:
; X64-LINUX: # BB#0: # %entry
; X64-LINUX-NEXT: subq $-128, (%rdi)
; X64-LINUX-NEXT: retq
;
; X64-WIN32-LABEL: test13:
; X64-WIN32: # BB#0: # %entry
; X64-WIN32-NEXT: subq $-128, (%rcx)
; X64-WIN32-NEXT: retq
entry:
%aa = load i64, i64* %a
%b = add i64 %aa, 128
store i64 %b, i64* %a
ret void
; X32-LABEL: test13:
; X32: addl (%
; X32-NEXT: adcl $0,
; X64-LABEL: test13:
; X64: subq $-128, (%
}

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@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i386-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32
; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sahf %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK64
@ -10,16 +11,39 @@
@L = external global i32
@M = external global i8
declare i32 @bar(i64)
; CHECK-LABEL: plus_one
; CHECK-NOT: seto
; CHECK-NOT: lahf
; CHECK-NOT: sahf
; CHECK-NOT: pushf
; CHECK-NOT: popf
; CHECK: incl L
define i1 @plus_one() {
define i1 @plus_one() nounwind {
; CHECK32-LABEL: plus_one:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: incl L
; CHECK32-NEXT: jne .LBB0_2
; CHECK32-NEXT: # BB#1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB0_2
; CHECK32-NEXT: # BB#3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB0_2: # %exit
; CHECK32-NEXT: movb $1, %al
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: plus_one:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: incl {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB0_2
; CHECK64-NEXT: # BB#1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB0_2
; CHECK64-NEXT: # BB#3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB0_2: # %exit
; CHECK64-NEXT: movb $1, %al
; CHECK64-NEXT: retq
entry:
%loaded_L = load i32, i32* @L
%val = add nsw i32 %loaded_L, 1 ; N.B. will emit inc.
@ -38,14 +62,40 @@ exit2:
ret i1 false
}
; CHECK-LABEL: plus_forty_two
; CHECK-NOT: seto
; CHECK-NOT: lahf
; CHECK-NOT: sahf
; CHECK-NOT: pushf
; CHECK-NOT: popf
; CHECK: addl $42,
define i1 @plus_forty_two() {
define i1 @plus_forty_two() nounwind {
; CHECK32-LABEL: plus_forty_two:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: movl L, %ecx
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: addl $42, %ecx
; CHECK32-NEXT: movl %ecx, L
; CHECK32-NEXT: jne .LBB1_2
; CHECK32-NEXT: # BB#1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB1_2
; CHECK32-NEXT: # BB#3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB1_2: # %exit
; CHECK32-NEXT: movb $1, %al
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: plus_forty_two:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: movl {{.*}}(%rip), %ecx
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: addl $42, %ecx
; CHECK64-NEXT: movl %ecx, {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB1_2
; CHECK64-NEXT: # BB#1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB1_2
; CHECK64-NEXT: # BB#3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB1_2: # %exit
; CHECK64-NEXT: movb $1, %al
; CHECK64-NEXT: retq
entry:
%loaded_L = load i32, i32* @L
%val = add nsw i32 %loaded_L, 42 ; N.B. won't emit inc.
@ -64,14 +114,36 @@ exit2:
ret i1 false
}
; CHECK-LABEL: minus_one
; CHECK-NOT: seto
; CHECK-NOT: lahf
; CHECK-NOT: sahf
; CHECK-NOT: pushf
; CHECK-NOT: popf
; CHECK: decl L
define i1 @minus_one() {
define i1 @minus_one() nounwind {
; CHECK32-LABEL: minus_one:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: decl L
; CHECK32-NEXT: jne .LBB2_2
; CHECK32-NEXT: # BB#1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB2_2
; CHECK32-NEXT: # BB#3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB2_2: # %exit
; CHECK32-NEXT: movb $1, %al
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: minus_one:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: decl {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB2_2
; CHECK64-NEXT: # BB#1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB2_2
; CHECK64-NEXT: # BB#3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB2_2: # %exit
; CHECK64-NEXT: movb $1, %al
; CHECK64-NEXT: retq
entry:
%loaded_L = load i32, i32* @L
%val = add nsw i32 %loaded_L, -1 ; N.B. will emit dec.
@ -90,14 +162,40 @@ exit2:
ret i1 false
}
; CHECK-LABEL: minus_forty_two
; CHECK-NOT: seto
; CHECK-NOT: lahf
; CHECK-NOT: sahf
; CHECK-NOT: pushf
; CHECK-NOT: popf
; CHECK: addl $-42,
define i1 @minus_forty_two() {
define i1 @minus_forty_two() nounwind {
; CHECK32-LABEL: minus_forty_two:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: movl L, %ecx
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: addl $-42, %ecx
; CHECK32-NEXT: movl %ecx, L
; CHECK32-NEXT: jne .LBB3_2
; CHECK32-NEXT: # BB#1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB3_2
; CHECK32-NEXT: # BB#3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB3_2: # %exit
; CHECK32-NEXT: movb $1, %al
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: minus_forty_two:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: movl {{.*}}(%rip), %ecx
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: addl $-42, %ecx
; CHECK64-NEXT: movl %ecx, {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB3_2
; CHECK64-NEXT: # BB#1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB3_2
; CHECK64-NEXT: # BB#3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB3_2: # %exit
; CHECK64-NEXT: movb $1, %al
; CHECK64-NEXT: retq
entry:
%loaded_L = load i32, i32* @L
%val = add nsw i32 %loaded_L, -42 ; N.B. won't emit dec.
@ -116,14 +214,75 @@ exit2:
ret i1 false
}
; CHECK-LABEL: test_intervening_call:
; CHECK: cmpxchg
; CHECK: seto %al
; CHECK-NEXT: lahf
; CHECK: call{{[lq]}} bar
; CHECK: addb $127, %al
; CHECK-NEXT: sahf
define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) {
define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) nounwind {
; CHECK32-LABEL: test_intervening_call:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: pushl %ebp
; CHECK32-NEXT: movl %esp, %ebp
; CHECK32-NEXT: pushl %ebx
; CHECK32-NEXT: pushl %esi
; CHECK32-NEXT: movl 12(%ebp), %eax
; CHECK32-NEXT: movl 16(%ebp), %edx
; CHECK32-NEXT: movl 20(%ebp), %ebx
; CHECK32-NEXT: movl 24(%ebp), %ecx
; CHECK32-NEXT: movl 8(%ebp), %esi
; CHECK32-NEXT: lock cmpxchg8b (%esi)
; CHECK32-NEXT: pushl %eax
; CHECK32-NEXT: seto %al
; CHECK32-NEXT: lahf
; CHECK32-NEXT: movl %eax, %esi
; CHECK32-NEXT: popl %eax
; CHECK32-NEXT: subl $8, %esp
; CHECK32-NEXT: pushl %edx
; CHECK32-NEXT: pushl %eax
; CHECK32-NEXT: calll bar
; CHECK32-NEXT: addl $16, %esp
; CHECK32-NEXT: movl %esi, %eax
; CHECK32-NEXT: addb $127, %al
; CHECK32-NEXT: sahf
; CHECK32-NEXT: jne .LBB4_3
; CHECK32-NEXT: # BB#1: # %t
; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB4_2
; CHECK32-NEXT: .LBB4_3: # %f
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: .LBB4_2: # %t
; CHECK32-NEXT: xorl %edx, %edx
; CHECK32-NEXT: popl %esi
; CHECK32-NEXT: popl %ebx
; CHECK32-NEXT: popl %ebp
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: test_intervening_call:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: pushq %rbp
; CHECK64-NEXT: movq %rsp, %rbp
; CHECK64-NEXT: pushq %rbx
; CHECK64-NEXT: pushq %rax
; CHECK64-NEXT: movq %rsi, %rax
; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi)
; CHECK64-NEXT: pushq %rax
; CHECK64-NEXT: seto %al
; CHECK64-NEXT: lahf
; CHECK64-NEXT: movq %rax, %rbx
; CHECK64-NEXT: popq %rax
; CHECK64-NEXT: movq %rax, %rdi
; CHECK64-NEXT: callq bar
; CHECK64-NEXT: movq %rbx, %rax
; CHECK64-NEXT: addb $127, %al
; CHECK64-NEXT: sahf
; CHECK64-NEXT: jne .LBB4_3
; CHECK64-NEXT: # BB#1: # %t
; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: jmp .LBB4_2
; CHECK64-NEXT: .LBB4_3: # %f
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: .LBB4_2: # %t
; CHECK64-NEXT: addq $8, %rsp
; CHECK64-NEXT: popq %rbx
; CHECK64-NEXT: popq %rbp
; CHECK64-NEXT: retq
entry:
; cmpxchg sets EFLAGS, call clobbers it, then br uses EFLAGS.
%cx = cmpxchg i64* %foo, i64 %bar, i64 %baz seq_cst seq_cst
%v = extractvalue { i64, i1 } %cx, 0
@ -138,37 +297,83 @@ f:
ret i64 0
}
; CHECK-LABEL: test_two_live_flags:
; CHECK: cmpxchg
; CHECK: seto %al
; CHECK-NEXT: lahf
; Save result of the first cmpxchg into a temporary.
; For 32-bit ISA, EDX, EAX are used by the results.
; EAX, EBX, ECX, and EDX are used to set the arguments.
; That leaves us EDI and ESI.
; CHECK32-NEXT: movl %[[AX:eax]], %[[TMP:e[ds]i]]
; For 64-bit ISA, RAX is used for both the result and argument.
; This leaves us plenty of choices for the temporary. For now,
; this is rdx, but any register could do.
; CHECK64-NEXT: mov{{[lq]}} %[[AX:[er]ax]], %[[TMP:rdx]]
; CHECK: cmpxchg
; CHECK-NEXT: sete %al
; Save result of the second cmpxchg onto the stack.
; CHECK-NEXT: push{{[lq]}} %[[AX]]
; Restore result of the first cmpxchg from D, put it back in EFLAGS.
; CHECK-NEXT: mov{{[lq]}} %[[TMP]], %[[AX]]
; CHECK-NEXT: addb $127, %al
; CHECK-NEXT: sahf
; Restore result of the second cmpxchg from the stack.
; CHECK-NEXT: pop{{[lq]}} %[[AX]]
; Test from EFLAGS restored from first cmpxchg, jump if that fails.
; CHECK-NEXT: jne
; Fallthrough to test the second cmpxchg's result.
; CHECK: testb %al, %al
; CHECK-NEXT: je
define i64 @test_two_live_flags(
i64* %foo0, i64 %bar0, i64 %baz0,
i64* %foo1, i64 %bar1, i64 %baz1) {
define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i64 %bar1, i64 %baz1) nounwind {
; CHECK32-LABEL: test_two_live_flags:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: pushl %ebp
; CHECK32-NEXT: movl %esp, %ebp
; CHECK32-NEXT: pushl %ebx
; CHECK32-NEXT: pushl %edi
; CHECK32-NEXT: pushl %esi
; CHECK32-NEXT: movl 44(%ebp), %edi
; CHECK32-NEXT: movl 12(%ebp), %eax
; CHECK32-NEXT: movl 16(%ebp), %edx
; CHECK32-NEXT: movl 20(%ebp), %ebx
; CHECK32-NEXT: movl 24(%ebp), %ecx
; CHECK32-NEXT: movl 8(%ebp), %esi
; CHECK32-NEXT: lock cmpxchg8b (%esi)
; CHECK32-NEXT: seto %al
; CHECK32-NEXT: lahf
; CHECK32-NEXT: movl %eax, %esi
; CHECK32-NEXT: movl 32(%ebp), %eax
; CHECK32-NEXT: movl 36(%ebp), %edx
; CHECK32-NEXT: movl %edi, %ecx
; CHECK32-NEXT: movl 40(%ebp), %ebx
; CHECK32-NEXT: movl 28(%ebp), %edi
; CHECK32-NEXT: lock cmpxchg8b (%edi)
; CHECK32-NEXT: sete %al
; CHECK32-NEXT: pushl %eax
; CHECK32-NEXT: movl %esi, %eax
; CHECK32-NEXT: addb $127, %al
; CHECK32-NEXT: sahf
; CHECK32-NEXT: popl %eax
; CHECK32-NEXT: jne .LBB5_4
; CHECK32-NEXT: # BB#1: # %entry
; CHECK32-NEXT: testb %al, %al
; CHECK32-NEXT: je .LBB5_4
; CHECK32-NEXT: # BB#2: # %t
; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB5_3
; CHECK32-NEXT: .LBB5_4: # %f
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: .LBB5_3: # %t
; CHECK32-NEXT: xorl %edx, %edx
; CHECK32-NEXT: popl %esi
; CHECK32-NEXT: popl %edi
; CHECK32-NEXT: popl %ebx
; CHECK32-NEXT: popl %ebp
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: test_two_live_flags:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: pushq %rbp
; CHECK64-NEXT: movq %rsp, %rbp
; CHECK64-NEXT: movq %rsi, %rax
; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi)
; CHECK64-NEXT: seto %al
; CHECK64-NEXT: lahf
; CHECK64-NEXT: movq %rax, %rdx
; CHECK64-NEXT: movq %r8, %rax
; CHECK64-NEXT: lock cmpxchgq %r9, (%rcx)
; CHECK64-NEXT: sete %al
; CHECK64-NEXT: pushq %rax
; CHECK64-NEXT: movq %rdx, %rax
; CHECK64-NEXT: addb $127, %al
; CHECK64-NEXT: sahf
; CHECK64-NEXT: popq %rax
; CHECK64-NEXT: jne .LBB5_3
; CHECK64-NEXT: # BB#1: # %entry
; CHECK64-NEXT: testb %al, %al
; CHECK64-NEXT: je .LBB5_3
; CHECK64-NEXT: # BB#2: # %t
; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: popq %rbp
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB5_3: # %f
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: popq %rbp
; CHECK64-NEXT: retq
entry:
%cx0 = cmpxchg i64* %foo0, i64 %bar0, i64 %baz0 seq_cst seq_cst
%p0 = extractvalue { i64, i1 } %cx0, 1
%cx1 = cmpxchg i64* %foo1, i64 %bar1, i64 %baz1 seq_cst seq_cst
@ -183,15 +388,30 @@ f:
ret i64 0
}
; CHECK-LABEL: asm_clobbering_flags:
; CHECK: test
; CHECK-NEXT: setg
; CHECK-NEXT: #APP
; CHECK-NEXT: bsfl
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl
; CHECK-NEXT: ret
define i1 @asm_clobbering_flags(i32* %mem) {
define i1 @asm_clobbering_flags(i32* %mem) nounwind {
; CHECK32-LABEL: asm_clobbering_flags:
; CHECK32: # BB#0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: movl (%ecx), %edx
; CHECK32-NEXT: testl %edx, %edx
; CHECK32-NEXT: setg %al
; CHECK32-NEXT: #APP
; CHECK32-NEXT: bsfl %edx, %edx
; CHECK32-NEXT: #NO_APP
; CHECK32-NEXT: movl %edx, (%ecx)
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: asm_clobbering_flags:
; CHECK64: # BB#0: # %entry
; CHECK64-NEXT: movl (%rdi), %ecx
; CHECK64-NEXT: testl %ecx, %ecx
; CHECK64-NEXT: setg %al
; CHECK64-NEXT: #APP
; CHECK64-NEXT: bsfl %ecx, %ecx
; CHECK64-NEXT: #NO_APP
; CHECK64-NEXT: movl %ecx, (%rdi)
; CHECK64-NEXT: retq
entry:
%val = load i32, i32* %mem, align 4
%cmp = icmp sgt i32 %val, 0
%res = tail call i32 asm "bsfl $1,$0", "=r,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %val)

View File

@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -o - %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
@a = external global i32, align 4
@ -14,20 +15,52 @@ target triple = "i386-unknown-linux-gnu"
@e = external global i64, align 8
@g = external global i32, align 4
; Function Attrs: norecurse nounwind optsize readnone
declare i32 @fn1(i32 returned) #0
declare i32 @fn1(i32 returned) optsize readnone
declare i32 @main() optsize
; CHECK-LABEL: fn2
; CHECK: calll putchar
; CHECK: addl $1,
; CHECK: adcl $0,
; Function Attrs: nounwind optsize
define void @fn2() #1 {
declare i32 @putchar(i32) nounwind
define void @fn2() nounwind optsize {
; CHECK-LABEL: fn2:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: movl $48, (%esp)
; CHECK-NEXT: calll putchar
; CHECK-NEXT: movl h, %eax
; CHECK-NEXT: movl c, %ecx
; CHECK-NEXT: movl j, %edx
; CHECK-NEXT: movl (%edx), %edx
; CHECK-NEXT: movl (%edx), %edx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: cmpl (%edx), %ecx
; CHECK-NEXT: setg %bl
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: cmpl %ebx, i
; CHECK-NEXT: setg %cl
; CHECK-NEXT: movl %ecx, b
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: cmpl %ecx, %eax
; CHECK-NEXT: setg %dl
; CHECK-NEXT: xorl %edx, a
; CHECK-NEXT: movl d, %eax
; CHECK-NEXT: movl (%eax), %eax
; CHECK-NEXT: andl %eax, e
; CHECK-NEXT: sarl $31, %eax
; CHECK-NEXT: andl %eax, e+4
; CHECK-NEXT: decl g
; CHECK-NEXT: movl f, %eax
; CHECK-NEXT: addl $1, %eax
; CHECK-NEXT: adcl $0, f+4
; CHECK-NEXT: movl %eax, f
; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
entry:
%putchar = tail call i32 @putchar(i32 48)
%0 = load volatile i32, i32* @h, align 4
%1 = load i32, i32* @c, align 4, !tbaa !2
%1 = load i32, i32* @c, align 4, !tbaa !1
%2 = load i32***, i32**** @j, align 4
%3 = load i32**, i32*** %2, align 4
%4 = load i32*, i32** %3, align 4
@ -58,26 +91,12 @@ entry:
ret void
}
; Function Attrs: nounwind optsize
declare i32 @main() #1
; Function Attrs: nounwind
declare i32 @putchar(i32) #2
attributes #0 = { optsize readnone }
attributes #1 = { optsize }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 1, !"NumRegisterParameters", i32 0}
!1 = !{!"clang version 5.0.0 (trunk 300074) (llvm/trunk 300078)"}
!2 = !{!3, !3, i64 0}
!3 = !{!"int", !4, i64 0}
!4 = !{!"omnipotent char", !5, i64 0}
!5 = !{!"Simple C/C++ TBAA"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !4, i64 0}
!8 = !{!9, !9, i64 0}
!9 = !{!"long long", !4, i64 0}
!1 = !{!2, !2, i64 0}
!2 = !{!"int", !3, i64 0}
!3 = !{!"omnipotent char", !4, i64 0}
!4 = !{!"Simple C/C++ TBAA"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !3, i64 0}
!7 = !{!8, !8, i64 0}
!8 = !{!"long long", !3, i64 0}