forked from OSchip/llvm-project
Updated version of r96634 (which was reverted due to failing 176.gcc and
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE could remove one half of a stack adjust down/up pair, causing PEI to assert. This update fixes that, and the tests now pass. llvm-svn: 96822
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@ -587,6 +587,17 @@ public:
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return !hasFP(MF);
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}
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/// canSimplifyCallFramePseudos - When possible, it's best to simplify the
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/// call frame pseudo ops before doing frame index elimination. This is
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/// possible only when frame index references between the pseudos won't
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/// need adjusted for the call frame adjustments. Normally, that's true
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/// if the function has a reserved call frame or a frame pointer. Some
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/// targets (Thumb2, for example) may have more complicated criteria,
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/// however, and can override this behavior.
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virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const {
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return hasReservedCallFrame(MF) || hasFP(MF);
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}
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/// hasReservedSpillSlot - Return true if target has reserved a spill slot in
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/// the stack frame of the given function for the specified register. e.g. On
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/// x86, if the frame register is required, the first fixed stack object is
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@ -175,9 +175,10 @@ void PEI::calculateCallsInformation(MachineFunction &Fn) {
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MachineBasicBlock::iterator I = *i;
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// If call frames are not being included as part of the stack frame, and
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// there is no dynamic allocation (therefore referencing frame slots off
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// sp), leave the pseudo ops alone. We'll eliminate them later.
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if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
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// the target doesn't indicate otherwise, remove the call frame pseudos
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// here. The sub/add sp instruction pairs are still inserted, but we don't
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// need to track the SP adjustment for frame index elimination.
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if (RegInfo->canSimplifyCallFramePseudos(Fn))
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RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
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}
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}
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@ -1085,6 +1085,16 @@ hasReservedCallFrame(MachineFunction &MF) const {
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return !MF.getFrameInfo()->hasVarSizedObjects();
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}
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// canSimplifyCallFramePseudos - If there is a reserved call frame, the
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// call frame pseudos can be simplified. Unlike most targets, having a FP
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// is not sufficient here since we still may reference some objects via SP
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// even when FP is available in Thumb2 mode.
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bool ARMBaseRegisterInfo::
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canSimplifyCallFramePseudos(MachineFunction &MF) const {
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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return hasReservedCallFrame(MF) || (AFI->isThumb1OnlyFunction() && hasFP(MF));
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}
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static void
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emitSPUpdate(bool isARM,
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MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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@ -138,6 +138,7 @@ public:
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virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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virtual bool hasReservedCallFrame(MachineFunction &MF) const;
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virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const;
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virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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@ -635,7 +635,10 @@ PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx,
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i32imm:$size), NoItinerary,
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"${instid:label} ${cpidx:cpentry}", []>;
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let Defs = [SP], Uses = [SP] in {
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// FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE
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// from removing one half of the matched pairs. That breaks PEI, which assumes
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// these will always be in pairs, and asserts if it finds otherwise. Better way?
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let Defs = [SP], Uses = [SP], hasSideEffects = 1 in {
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def ADJCALLSTACKUP :
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PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), NoItinerary,
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"@ ADJCALLSTACKUP $amt1",
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@ -120,7 +120,10 @@ def t_addrmode_sp : Operand<i32>,
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// Miscellaneous Instructions.
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//
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let Defs = [SP], Uses = [SP] in {
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// FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE
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// from removing one half of the matched pairs. That breaks PEI, which assumes
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// these will always be in pairs, and asserts if it finds otherwise. Better way?
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let Defs = [SP], Uses = [SP], hasSideEffects = 1 in {
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def tADJCALLSTACKUP :
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PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2), NoItinerary,
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"@ tADJCALLSTACKUP $amt1",
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