[LLDB] [ARM] Use r11 as frame pointer on Windows on ARM

Extend EmulateMOVRdRm to identify "mov r11, sp" in thumb mode as
setting the frame pointer, if r11 is the frame pointer register.

Differential Revision: https://reviews.llvm.org/D70797
This commit is contained in:
Martin Storsjö 2019-10-16 00:08:28 +03:00
parent 8059188c45
commit 45c843de4e
4 changed files with 152 additions and 2 deletions

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@ -850,6 +850,7 @@ uint32_t EmulateInstructionARM::GetFramePointerRegisterNumber() const {
/* On Apple iOS et al, the frame pointer register is always r7.
* Typically on other ARM systems, thumb code uses r7; arm code uses r11.
* Windows on ARM, which is in thumb mode, uses r11 though.
*/
uint32_t fp_regnum = 11;
@ -857,7 +858,7 @@ uint32_t EmulateInstructionARM::GetFramePointerRegisterNumber() const {
if (is_apple)
fp_regnum = 7;
if (m_opcode_mode == eModeThumb)
if (m_opcode_mode == eModeThumb && !m_arch.GetTriple().isOSWindows())
fp_regnum = 7;
return fp_regnum;
@ -879,6 +880,7 @@ uint32_t EmulateInstructionARM::GetFramePointerDWARFRegisterNumber() const {
/* On Apple iOS et al, the frame pointer register is always r7.
* Typically on other ARM systems, thumb code uses r7; arm code uses r11.
* Windows on ARM, which is in thumb mode, uses r11 though.
*/
uint32_t fp_regnum = dwarf_r11;
@ -886,7 +888,7 @@ uint32_t EmulateInstructionARM::GetFramePointerDWARFRegisterNumber() const {
if (is_apple)
fp_regnum = dwarf_r7;
if (m_opcode_mode == eModeThumb)
if (m_opcode_mode == eModeThumb && !m_arch.GetTriple().isOSWindows())
fp_regnum = dwarf_r7;
return fp_regnum;
@ -1343,6 +1345,8 @@ bool EmulateInstructionARM::EmulateMOVRdRm(const uint32_t opcode,
EmulateInstruction::Context context;
if (Rd == 13)
context.type = EmulateInstruction::eContextAdjustStackPointer;
else if (Rd == GetFramePointerRegisterNumber() && Rm == 13)
context.type = EmulateInstruction::eContextSetFramePointer;
else
context.type = EmulateInstruction::eContextRegisterPlusOffset;
RegisterInfo dwarf_reg;

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@ -0,0 +1,17 @@
Test that unwind plans use the frame pointer register correctly.
REQUIRES: arm
RUN: yaml2obj %S/Inputs/arm-fp-unwind.exe.yaml > %T/arm-fp-unwind.exe
RUN: yaml2obj %S/Inputs/arm-fp-unwind.dmp.yaml > %T/arm-fp-unwind.dmp
RUN: %lldb -O "settings set target.exec-search-paths %T" \
RUN: -c %T/arm-fp-unwind.dmp -o "image show-unwind -a 0x00c71010" -b \
RUN: | FileCheck %s
CHECK: Assembly language inspection UnwindPlan:
CHECK-NEXT: This UnwindPlan originally sourced from EmulateInstructionARM
CHECK-NEXT: This UnwindPlan is sourced from the compiler: no.
CHECK-NEXT: This UnwindPlan is valid at all instruction locations: yes.
CHECK-NEXT: row[0]: 0: CFA=sp +0 =>
CHECK-NEXT: row[1]: 4: CFA=sp +8 => fp=[CFA-8] lr=[CFA-4]
CHECK-NEXT: row[2]: 6: CFA=fp +8 => fp=[CFA-8] lr=[CFA-4]