forked from OSchip/llvm-project
[LegalizeVectorTypes] Remove non-constnat INSERT_SUBVECTOR handling. NFC
Now that D79814 has landed, we can assume that subvector ops use constant, in-range indices.
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@ -1143,16 +1143,14 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
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// boundary between the halves, we can avoid spilling the vector, and insert
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// into the lower half of the split vector directly.
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// TODO: The IdxVal == 0 constraint is artificial, we could do this whenever
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// the index is constant and there is no boundary crossing. But those cases
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// don't seem to get hit in practice.
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if (ConstantSDNode *ConstIdx = dyn_cast<ConstantSDNode>(Idx)) {
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unsigned IdxVal = ConstIdx->getZExtValue();
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if ((IdxVal == 0) && (IdxVal + SubElems <= VecElems / 2)) {
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EVT LoVT, HiVT;
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std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
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Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx);
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return;
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}
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// there is no boundary crossing. But those cases don't seem to get hit in
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// practice.
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unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
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if ((IdxVal == 0) && (IdxVal + SubElems <= VecElems / 2)) {
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EVT LoVT, HiVT;
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std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
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Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx);
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return;
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}
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// Spill the vector to the stack.
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