forked from OSchip/llvm-project
Factor topological order code to SelectionDAG. Clean up.
llvm-svn: 29430
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227a8425ac
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@ -99,8 +99,7 @@ namespace {
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: SelectionDAGISel(X86Lowering),
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X86Lowering(*TM.getTargetLowering()),
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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DAGSize(0), TopOrder(NULL), IdToOrder(NULL),
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RMRange(NULL), ReachabilityMatrix(NULL) {}
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DAGSize(0) {}
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virtual bool runOnFunction(Function &Fn) {
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// Make sure we re-emit a set of the global base reg if necessary
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@ -124,7 +123,6 @@ namespace {
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#include "X86GenDAGISel.inc"
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private:
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void DetermineTopologicalOrdering();
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void DetermineReachability(SDNode *f, SDNode *t);
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void Select(SDOperand &Result, SDOperand N);
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@ -187,43 +185,37 @@ namespace {
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/// TopOrder - Topological ordering of all nodes in the DAG.
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///
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SDNode* *TopOrder;
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std::vector<SDNode*> TopOrder;
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/// IdToOrder - Node id to topological order map.
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///
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unsigned *IdToOrder;
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/// RMRange - The range of reachibility information available for the
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/// particular source node.
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unsigned *RMRange;
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/// ReachabilityMatrix - A N x N matrix representing all pairs reachibility
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/// ReachabilityMatrix - A N x N matrix representing all pairs reachability
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/// information. One bit per potential edge.
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unsigned char *ReachabilityMatrix;
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std::vector<bool> ReachabilityMatrix;
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/// RMRange - The range of reachability information available for the
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/// particular source node.
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std::vector<unsigned> ReachMatrixRange;
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inline void setReachable(SDNode *f, SDNode *t) {
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unsigned Idx = f->getNodeId() * DAGSize + t->getNodeId();
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ReachabilityMatrix[Idx / 8] |= 1 << (Idx % 8);
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ReachabilityMatrix[Idx] = true;
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}
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inline bool isReachable(SDNode *f, SDNode *t) {
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unsigned Idx = f->getNodeId() * DAGSize + t->getNodeId();
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return ReachabilityMatrix[Idx / 8] & (1 << (Idx % 8));
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return ReachabilityMatrix[Idx];
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}
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/// UnfoldableSet - An boolean array representing nodes which have been
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/// folded into addressing modes and therefore should not be folded in
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/// another operation.
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unsigned char *UnfoldableSet;
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std::vector<bool> UnfoldableSet;
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inline void setUnfoldable(SDNode *N) {
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unsigned Id = N->getNodeId();
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UnfoldableSet[Id / 8] |= 1 << (Id % 8);
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UnfoldableSet[N->getNodeId()] = true;
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}
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inline bool isUnfoldable(SDNode *N) {
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unsigned Id = N->getNodeId();
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return UnfoldableSet[Id / 8] & (1 << (Id % 8));
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return UnfoldableSet[N->getNodeId()];
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}
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#ifndef NDEBUG
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@ -259,58 +251,12 @@ bool X86DAGToDAGISel::CanBeFoldedBy(SDNode *N, SDNode *U) {
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return true;
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}
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/// DetermineTopologicalOrdering - Determine topological ordering of the nodes
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/// in the DAG.
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void X86DAGToDAGISel::DetermineTopologicalOrdering() {
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TopOrder = new SDNode*[DAGSize];
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IdToOrder = new unsigned[DAGSize];
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memset(IdToOrder, 0, DAGSize * sizeof(unsigned));
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RMRange = new unsigned[DAGSize];
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memset(RMRange, 0, DAGSize * sizeof(unsigned));
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std::vector<unsigned> InDegree(DAGSize);
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std::deque<SDNode*> Sources;
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for (SelectionDAG::allnodes_iterator I = CurDAG->allnodes_begin(),
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E = CurDAG->allnodes_end(); I != E; ++I) {
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SDNode *N = I;
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unsigned Degree = N->use_size();
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InDegree[N->getNodeId()] = Degree;
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if (Degree == 0)
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Sources.push_back(I);
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}
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unsigned Order = 0;
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while (!Sources.empty()) {
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SDNode *N = Sources.front();
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Sources.pop_front();
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TopOrder[Order] = N;
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IdToOrder[N->getNodeId()] = Order;
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Order++;
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for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
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SDNode *P = I->Val;
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int PId = P->getNodeId();
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unsigned Degree = InDegree[PId] - 1;
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if (Degree == 0)
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Sources.push_back(P);
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InDegree[PId] = Degree;
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}
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}
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}
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/// DetermineReachability - Determine reachibility between all pairs of nodes
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/// DetermineReachability - Determine reachability between all pairs of nodes
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/// between f and t in topological order.
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void X86DAGToDAGISel::DetermineReachability(SDNode *f, SDNode *t) {
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if (!ReachabilityMatrix) {
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unsigned RMSize = (DAGSize * DAGSize + 7) / 8;
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ReachabilityMatrix = new unsigned char[RMSize];
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memset(ReachabilityMatrix, 0, RMSize);
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}
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int Idf = f->getNodeId();
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int Idt = t->getNodeId();
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unsigned Orderf = IdToOrder[Idf];
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unsigned Ordert = IdToOrder[Idt];
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unsigned Range = RMRange[Idf];
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unsigned Orderf = f->getNodeId();
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unsigned Ordert = t->getNodeId();
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unsigned Range = ReachMatrixRange[Orderf];
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if (Range >= Ordert)
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return;
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if (Range < Orderf)
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@ -326,7 +272,7 @@ void X86DAGToDAGISel::DetermineReachability(SDNode *f, SDNode *t) {
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for (unsigned i2 = Orderf; ; ++i2) {
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SDNode *M = TopOrder[i2];
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if (isReachable(M, N)) {
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// Update reachibility from M to N's operands.
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// Update reachability from M to N's operands.
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for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E;++I)
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setReachable(M, I->Val);
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}
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@ -334,7 +280,7 @@ void X86DAGToDAGISel::DetermineReachability(SDNode *f, SDNode *t) {
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}
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}
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RMRange[Idf] = Ordert;
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ReachMatrixRange[Orderf] = Ordert;
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}
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/// InstructionSelectBasicBlock - This callback is invoked by SelectionDAGISel
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@ -343,12 +289,11 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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DEBUG(BB->dump());
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MachineFunction::iterator FirstMBB = BB;
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DAGSize = DAG.AssignNodeIds();
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unsigned NumBytes = (DAGSize+7) / 8;
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UnfoldableSet = new unsigned char[NumBytes];
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memset(UnfoldableSet, 0, NumBytes);
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DetermineTopologicalOrdering();
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TopOrder = DAG.AssignTopologicalOrder();
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DAGSize = TopOrder.size();
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ReachabilityMatrix.assign(DAGSize*DAGSize, false);
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ReachMatrixRange.assign(DAGSize, 0);
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UnfoldableSet.assign(DAGSize, false);
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// Codegen the basic block.
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#ifndef NDEBUG
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@ -360,15 +305,6 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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DEBUG(std::cerr << "===== Instruction selection ends:\n");
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#endif
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delete[] ReachabilityMatrix;
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delete[] TopOrder;
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delete[] IdToOrder;
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delete[] RMRange;
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delete[] UnfoldableSet;
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ReachabilityMatrix = NULL;
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TopOrder = NULL;
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IdToOrder = RMRange = NULL;
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UnfoldableSet = NULL;
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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