forked from OSchip/llvm-project
[ELF][PPC64] Implement IPLT code sequence for non-preemptible IFUNC
Non-preemptible IFUNC are placed in in.iplt (.glink on EM_PPC64). If there is a non-GOT non-PLT relocation, for pointer equality, we change the type of the symbol from STT_IFUNC and STT_FUNC and bind it to the .glink entry. On EM_386, EM_X86_64, EM_ARM, and EM_AARCH64, the PLT code sequence loads the address from its associated .got.plt slot. An IPLT also has an associated .got.plt slot and can use the same code sequence. On EM_PPC64, the PLT code sequence is actually a bl instruction in .glink . It jumps to `__glink_PLTresolve` (the PLT header). and `__glink_PLTresolve` computes the .plt slot (relocated by R_PPC64_JUMP_SLOT). An IPLT does not have an associated R_PPC64_JUMP_SLOT, so we cannot use `bl` in .iplt . Instead, create a call stub which has a similar code sequence as PPC64PltCallStub. We don't save the TOC pointer, so such scenarios will not work: a function pointer to a non-preemptible ifunc, which resolves to a function defined in another DSO. This is the restriction described by https://sourceware.org/glibc/wiki/GNU_IFUNC (though on many architectures it works in practice): Requirement (a): Resolver must be defined in the same translation unit as the implementations. If an ifunc is taken address but not called, technically we don't need an entry for it, but we currently do that. This patch makes // clang -fuse-ld=lld -fno-pie -no-pie a.c // clang -fuse-ld=lld -fPIE -pie a.c #include <stdio.h> static void impl(void) { puts("meow"); } void thefunc(void) __attribute__((ifunc("resolver"))); void *resolver(void) { return &impl; } int main(void) { thefunc(); void (*theptr)(void) = &thefunc; theptr(); } work on Linux glibc and FreeBSD. Calling a function pointer pointing to a Non-preemptible IFUNC never worked before. Differential Revision: https://reviews.llvm.org/D71509
This commit is contained in:
Fangrui Song
parent
6f9b4c6826
commit
45acc35ac2
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@ -9,6 +9,7 @@
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "Thunks.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Support/Endian.h"
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@ -202,6 +203,8 @@ public:
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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void writeIplt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
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void writeGotHeader(uint8_t *buf) const override;
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bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
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@ -298,7 +301,7 @@ PPC64::PPC64() {
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symbolicRel = R_PPC64_ADDR64;
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pltHeaderSize = 60;
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pltEntrySize = 4;
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ipltEntrySize = 4;
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ipltEntrySize = 16; // PPC64PltCallStub::size
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gotBaseSymInGotPlt = false;
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gotHeaderEntriesNum = 1;
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gotPltHeaderEntriesNum = 2;
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@ -676,6 +679,11 @@ void PPC64::writePlt(uint8_t *buf, const Symbol &sym,
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write32(buf, 0x48000000 | ((-offset) & 0x03FFFFFc));
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}
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void PPC64::writeIplt(uint8_t *buf, const Symbol &sym,
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uint64_t /*pltEntryAddr*/) const {
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writePPC64LoadAndBranch(buf, sym.getGotPltVA() - getPPC64TocBase());
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}
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static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {
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// Relocations relative to the toc-base need to be adjusted by the Toc offset.
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uint64_t tocBiasedVal = val - ppc64TocOffset;
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@ -761,7 +761,7 @@ bool PPC32PltCallStub::isCompatibleWith(const InputSection &isec,
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return !config->isPic || (isec.file == file && rel.addend == addend);
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}
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static void writePPCLoadAndBranch(uint8_t *buf, int64_t offset) {
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void writePPC64LoadAndBranch(uint8_t *buf, int64_t offset) {
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uint16_t offHa = (offset + 0x8000) >> 16;
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uint16_t offLo = offset & 0xffff;
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@ -775,7 +775,7 @@ void PPC64PltCallStub::writeTo(uint8_t *buf) {
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int64_t offset = destination.getGotPltVA() - getPPC64TocBase();
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// Save the TOC pointer to the save-slot reserved in the call frame.
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write32(buf + 0, 0xf8410018); // std r2,24(r1)
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writePPCLoadAndBranch(buf + 4, offset);
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writePPC64LoadAndBranch(buf + 4, offset);
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}
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void PPC64PltCallStub::addSymbols(ThunkSection &isec) {
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@ -787,7 +787,7 @@ void PPC64PltCallStub::addSymbols(ThunkSection &isec) {
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void PPC64LongBranchThunk::writeTo(uint8_t *buf) {
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int64_t offset = in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
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getPPC64TocBase();
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writePPCLoadAndBranch(buf, offset);
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writePPC64LoadAndBranch(buf, offset);
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}
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void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) {
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@ -68,6 +68,8 @@ public:
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// ThunkSection.
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Thunk *addThunk(const InputSection &isec, Relocation &rel);
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void writePPC64LoadAndBranch(uint8_t *buf, int64_t offset);
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} // namespace elf
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} // namespace lld
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@ -2,66 +2,94 @@
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# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
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# RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
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# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
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# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
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# RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
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# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
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# NM-DAG: 0000000010028248 d .TOC.
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# NM-DAG: 00000000100101f8 i ifunc
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# NM-DAG: 00000000100101fc i ifunc2
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# SYM: Value Size Type Bind Vis Ndx
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# SYM: 0000000010028298 0 NOTYPE LOCAL HIDDEN 4 .TOC.
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# SYM: 0000000010010288 0 FUNC GLOBAL DEFAULT 3 ifunc1
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# SYM: 0000000010010210 0 IFUNC GLOBAL DEFAULT 2 ifunc2
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# SYM: 0000000010010278 0 FUNC GLOBAL DEFAULT 3 ifunc3
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# SECTIONS: .plt NOBITS 0000000010030250 000250 000010 00 WA 0 0 8
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# SECTIONS: .plt NOBITS 00000000100302a0 0002a0 000018 00 WA 0 0 8
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# __plt_ifunc - . = 0x10010218 - 0x10010208 = 16
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# __plt_ifunc2 - . = 0x1001022c - 0x10010210 = 28
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# CHECK: _start:
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# CHECK-NEXT: addis 2, 12, 2
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# CHECK-NEXT: addi 2, 2, -32696
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# CHECK-NEXT: 10010208: bl .+16
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# CHECK-NEXT: addi 2, 2, -32636
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# CHECK-NEXT: 1001021c: bl .+36
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# CHECK-NEXT: ld 2, 24(1)
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# CHECK-NEXT: 10010210: bl .+28
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# CHECK-NEXT: 10010224: bl .+48
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# CHECK-NEXT: ld 2, 24(1)
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# CHECK-NEXT: addis 3, 2, -2
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# CHECK-NEXT: addi 3, 3, 32752
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# CHECK-NEXT: addis 3, 2, -2
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# CHECK-NEXT: addi 3, 3, 32736
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# .plt[0] - .TOC. = 0x10030250 - 0x10028248 = (1<<16) - 32760
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# CHECK: __plt_ifunc:
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# .plt[0] - .TOC. = 0x100302b0 - 0x100282a8 = (1<<16) - 32760
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# CHECK: __plt_ifunc2:
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# CHECK-NEXT: std 2, 24(1)
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# CHECK-NEXT: addis 12, 2, 1
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# CHECK-NEXT: ld 12, -32760(12)
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# CHECK-NEXT: mtctr 12
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# CHECK-NEXT: bctr
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# .plt[1] - .TOC. = 0x10030250+8 - 0x10028248 = (1<<16) - 32752
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# CHECK: __plt_ifunc2:
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# .plt[1] - .TOC. = 0x100302b0+8 - 0x100282a8 = (1<<16) - 32752
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# CHECK: __plt_ifunc3:
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# CHECK-NEXT: std 2, 24(1)
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# CHECK-NEXT: addis 12, 2, 1
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# CHECK-NEXT: ld 12, -32752(12)
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# CHECK-NEXT: mtctr 12
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# CHECK-NEXT: bctr
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# CHECK-EMPTY:
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## Check that we emit 2 R_PPC64_IRELATIVE in .rela.dyn.
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## glibc powerpc64 does not eagerly resolve R_PPC64_IRELATIVE if they are in .rela.plt.
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## .glink has 3 IPLT entries for ifunc1, ifunc2 and ifunc3.
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## ifunc2 and ifunc3 have the same code sequence as their PLT call stubs.
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# CHECK: Disassembly of section .glink:
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# CHECK-EMPTY:
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# CHECK-NEXT: 0000000010010268 .glink:
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# CHECK-NEXT: addis 12, 2, 1
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# CHECK-NEXT: ld 12, -32760(12)
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# CHECK-NEXT: mtctr 12
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# CHECK-NEXT: bctr
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# CHECK-EMPTY:
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# CHECK-NEXT: 0000000010010278 ifunc3:
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# CHECK-NEXT: addis 12, 2, 1
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# CHECK-NEXT: ld 12, -32752(12)
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# CHECK-NEXT: mtctr 12
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# CHECK-NEXT: bctr
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# CHECK-EMPTY:
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# CHECK-NEXT: 0000000010010288 ifunc1:
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# CHECK-NEXT: addis 12, 2, 1
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# CHECK-NEXT: ld 12, -32744(12)
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# CHECK-NEXT: mtctr 12
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# CHECK-NEXT: bctr
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## Check that we emit 3 R_PPC64_IRELATIVE in .rela.dyn.
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# REL: .rela.dyn {
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# REL-NEXT: 0x10030250 R_PPC64_IRELATIVE - 0x100101F8
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# REL-NEXT: 0x10030258 R_PPC64_IRELATIVE - 0x100101FC
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# REL-NEXT: 0x100302A0 R_PPC64_IRELATIVE - 0x10010210
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# REL-NEXT: 0x100302A8 R_PPC64_IRELATIVE - 0x10010210
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# REL-NEXT: 0x100302B0 R_PPC64_IRELATIVE - 0x10010210
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# REL-NEXT: }
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.type ifunc STT_GNU_IFUNC
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.globl ifunc
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ifunc:
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nop
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.type ifunc2 STT_GNU_IFUNC
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.globl ifunc2
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.type ifunc1,@gnu_indirect_function
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.type ifunc2,@gnu_indirect_function
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.type ifunc3,@gnu_indirect_function
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.globl ifunc1, ifunc2, ifunc3
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ifunc1:
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ifunc2:
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nop
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ifunc3:
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blr
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.global _start
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.type _start,@function
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@ -72,7 +100,20 @@ _start:
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addi 2, 2, .TOC.-.Lfunc_gep0@l
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.Lfunc_lep0:
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.localentry _start, .Lfunc_lep0-.Lfunc_gep0
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bl ifunc
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nop
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## ifunc1 is taken address.
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## ifunc2 is called.
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## ifunc3 is both taken address and called.
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## We need to create IPLT entries in .glink for ifunc1 and ifunc3, change
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## their types from STT_GNU_IFUNC to STT_FUNC, and set their st_shndx/st_value
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## to their .glink entries. Technically we don't need an entry for ifunc2 in
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## .glink, but we currently do that.
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bl ifunc2
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nop
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bl ifunc3
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nop
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addis 3, 2, ifunc1@toc@ha
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addi 3, 3, ifunc1@toc@l
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addis 3, 2, ifunc3@toc@ha
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addi 3, 3, ifunc3@toc@l
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@ -14,12 +14,12 @@
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## to the address of the canonical PLT is fixed.
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# SEC: .text PROGBITS 00000000100101e0
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# SEC: .plt NOBITS 00000000100301f8
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# SEC: .plt NOBITS 0000000010030200
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# SEC: 00000000100101e8 0 FUNC GLOBAL DEFAULT 3 ifunc
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## .toc[0] stores the address of the canonical PLT.
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# HEX: section '.toc':
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# HEX-NEXT: 0x100201f0 e8010110 00000000
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# HEX-NEXT: 0x100201f8 e8010110 00000000
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# REL: .rela.dyn {
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# REL-NEXT: 0x100301f8 R_PPC64_IRELATIVE - 0x100101e8
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