forked from OSchip/llvm-project
[FastISel][X86] - Add branch weights
Add branch weights to branch instructions, so that the following passes can optimize based on it (i.e. basic block ordering). llvm-svn: 210863
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@ -42,6 +42,7 @@
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#include "llvm/CodeGen/FastISel.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/BranchProbabilityInfo.h"
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#include "llvm/Analysis/Loads.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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@ -981,7 +982,6 @@ FastISel::SelectInstruction(const Instruction *I) {
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/// the CFG.
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void
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FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DbgLoc) {
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if (FuncInfo.MBB->getBasicBlock()->size() > 1 &&
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FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
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// For more accurate line information if this is the only instruction
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@ -992,7 +992,11 @@ FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DbgLoc) {
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TII.InsertBranch(*FuncInfo.MBB, MSucc, nullptr,
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SmallVector<MachineOperand, 0>(), DbgLoc);
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}
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FuncInfo.MBB->addSuccessor(MSucc);
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uint32_t BranchWeight = 0;
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if (FuncInfo.BPI)
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BranchWeight = FuncInfo.BPI->getEdgeWeight(FuncInfo.MBB->getBasicBlock(),
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MSucc->getBasicBlock());
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FuncInfo.MBB->addSuccessor(MSucc, BranchWeight);
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}
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/// SelectFNeg - Emit an FNeg operation.
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@ -20,6 +20,7 @@
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#include "X86RegisterInfo.h"
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#include "X86Subtarget.h"
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#include "X86TargetMachine.h"
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#include "llvm/Analysis/BranchProbabilityInfo.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/FastISel.h"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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@ -1206,7 +1207,11 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
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}
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FastEmitBranch(FalseMBB, DbgLoc);
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FuncInfo.MBB->addSuccessor(TrueMBB);
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uint32_t BranchWeight = 0;
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if (FuncInfo.BPI)
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BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(),
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TrueMBB->getBasicBlock());
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FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
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return true;
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}
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} else if (TruncInst *TI = dyn_cast<TruncInst>(BI->getCondition())) {
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@ -1238,7 +1243,11 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(JmpOpc))
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.addMBB(TrueMBB);
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FastEmitBranch(FalseMBB, DbgLoc);
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FuncInfo.MBB->addSuccessor(TrueMBB);
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uint32_t BranchWeight = 0;
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if (FuncInfo.BPI)
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BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(),
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TrueMBB->getBasicBlock());
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FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
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return true;
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}
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}
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@ -1255,7 +1264,11 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(X86::JNE_4))
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.addMBB(TrueMBB);
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FastEmitBranch(FalseMBB, DbgLoc);
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FuncInfo.MBB->addSuccessor(TrueMBB);
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uint32_t BranchWeight = 0;
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if (FuncInfo.BPI)
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BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(),
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TrueMBB->getBasicBlock());
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FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
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return true;
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}
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@ -0,0 +1,19 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -fast-isel -fast-isel-abort -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; Test if the BBs are reordred according to their branch weights.
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define i64 @branch_weights_test(i64 %a, i64 %b) {
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; CHECK-LABEL: branch_weights_test
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; CHECK-LABEL: success
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; CHECK-LABEL: fail
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%1 = icmp ult i64 %a, %b
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br i1 %1, label %fail, label %success, !prof !0
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fail:
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ret i64 -1
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success:
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ret i64 0
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}
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!0 = metadata !{metadata !"branch_weights", i32 0, i32 2147483647}
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