forked from OSchip/llvm-project
[SystemZ] Add missing intrinsics to intrinsics-immarg.ll
As of r356091, support for the ImmArg intrinsics was added, including a SystemZ test case. However, that test case doesn't actually verify all SystemZ intrinsics with immediate arguments, only a subset. The rest of them actually works correctly, there's just no test for them. This patch add all missing intrinsics. llvm-svn: 358495
This commit is contained in:
Ulrich Weigand
parent
8fdc5abffe
commit
452060ab87
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@ -91,6 +91,87 @@ define <4 x i32> @test_vstrcf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2,
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ret <4 x i32> %ret
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}
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declare <16 x i8> @llvm.s390.vstrczb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
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define <16 x i8> @test_vstrczb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3)
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%ret = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3)
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ret <16 x i8> %ret
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}
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declare <8 x i16> @llvm.s390.vstrczh(<8 x i16>, <8 x i16>, <8 x i16>, i32)
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define <8 x i16> @test_vstrczh(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3)
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%ret = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3)
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ret <8 x i16> %ret
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}
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declare <4 x i32> @llvm.s390.vstrczf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
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define <4 x i32> @test_vstrczf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3)
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%ret = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3)
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ret <4 x i32> %ret
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}
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declare { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8>, <16 x i8>, <16 x i8>, i32)
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define { <16 x i8>, i32 } @test_vstrcbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3)
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%ret = call { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3)
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ret { <16 x i8>, i32 } %ret
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}
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declare { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16>, <8 x i16>, <8 x i16>, i32)
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define { <8 x i16>, i32 } @test_vstrchs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3)
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%ret = call { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3)
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ret { <8 x i16>, i32 } %ret
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}
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declare { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32>, <4 x i32>, <4 x i32>, i32)
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define { <4 x i32>, i32 } @test_vstrcfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3)
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%ret = call { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3)
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ret { <4 x i32>, i32 } %ret
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}
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declare { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8>, <16 x i8>, <16 x i8>, i32)
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define { <16 x i8>, i32 } @test_vstrczbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3)
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%ret = call { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3)
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ret { <16 x i8>, i32 } %ret
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}
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declare { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16>, <8 x i16>, <8 x i16>, i32)
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define { <8 x i16>, i32 } @test_vstrczhs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3)
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%ret = call { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3)
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ret { <8 x i16>, i32 } %ret
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}
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declare { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32>, <4 x i32>, <4 x i32>, i32)
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define { <4 x i32>, i32 } @test_vstrczfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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; CHECK-NEXT: %ret = call { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3)
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%ret = call { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3)
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ret { <4 x i32>, i32 } %ret
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}
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declare <16 x i8> @llvm.s390.verimb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
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define <16 x i8> @test_verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) {
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; CHECK: immarg operand has non-immediate parameter
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@ -156,6 +237,24 @@ define <16 x i8> @test_vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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ret <16 x i8> %res
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}
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declare <8 x i16> @llvm.s390.vfaeh(<8 x i16>, <8 x i16>, i32)
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define <8 x i16> @test_vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c)
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%res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c)
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ret <8 x i16> %res
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}
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declare <4 x i32> @llvm.s390.vfaef(<4 x i32>, <4 x i32>, i32)
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define <4 x i32> @test_vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c)
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%res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c)
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ret <4 x i32> %res
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}
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declare <16 x i8> @llvm.s390.vfaezb(<16 x i8>, <16 x i8>, i32)
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define <16 x i8> @test_vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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@ -164,3 +263,121 @@ define <16 x i8> @test_vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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%res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c)
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ret <16 x i8> %res
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}
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declare <8 x i16> @llvm.s390.vfaezh(<8 x i16>, <8 x i16>, i32)
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define <8 x i16> @test_vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c)
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%res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c)
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ret <8 x i16> %res
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}
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declare <4 x i32> @llvm.s390.vfaezf(<4 x i32>, <4 x i32>, i32)
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define <4 x i32> @test_vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c)
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%res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c)
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ret <4 x i32> %res
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}
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declare { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8>, <16 x i8>, i32)
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define { <16 x i8>, i32 } @test_vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c)
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%res = call { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c)
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ret { <16 x i8>, i32 } %res
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}
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declare { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16>, <8 x i16>, i32)
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define { <8 x i16>, i32 } @test_vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c)
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%res = call { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c)
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ret { <8 x i16>, i32 } %res
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}
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declare { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32>, <4 x i32>, i32)
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define { <4 x i32>, i32 } @test_vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c)
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%res = call { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c)
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ret { <4 x i32>, i32 } %res
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}
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declare { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8>, <16 x i8>, i32)
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define { <16 x i8>, i32 } @test_vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c)
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%res = call { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c)
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ret { <16 x i8>, i32 } %res
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}
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declare { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16>, <8 x i16>, i32)
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define { <8 x i16>, i32 } @test_vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c)
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%res = call { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c)
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ret { <8 x i16>, i32 } %res
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}
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declare { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32>, <4 x i32>, i32)
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define { <4 x i32>, i32 } @test_vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c)
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%res = call { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c)
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ret { <4 x i32>, i32 } %res
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}
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declare i32 @llvm.s390.lcbb(i8 *, i32)
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define i32 @test_lcbb(i8* %a, i32 %b) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %b
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; CHECK-NEXT: %res = call i32 @llvm.s390.lcbb(i8* %a, i32 %b)
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%res = call i32 @llvm.s390.lcbb(i8* %a, i32 %b)
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ret i32 %res
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}
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declare <16 x i8> @llvm.s390.vlbb(i8 *, i32)
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define <16 x i8> @test_vlbb(i8* %a, i32 %b) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %b
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; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vlbb(i8* %a, i32 %b)
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%res = call <16 x i8> @llvm.s390.vlbb(i8* %a, i32 %b)
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ret <16 x i8> %res
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}
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declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32)
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define <2 x i64> @test_vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c)
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%res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c)
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ret <2 x i64> %res
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}
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declare <16 x i8> @llvm.s390.vmslg(<2 x i64>, <2 x i64>, <16 x i8>, i32)
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define <16 x i8> @test_vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %d
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; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d)
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%res = call <16 x i8> @llvm.s390.vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d)
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ret <16 x i8> %res
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}
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declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32)
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define <16 x i8> @test_vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %c
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; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c)
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%res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c)
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ret <16 x i8> %res
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}
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