maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[WebAssembly][NFC] Finish cleaning up SIMD tablegen 

This commit is a follow-on to c2c2e9119e73, using the `Vec` records introduced
in that commit in the rest of the SIMD instruction definitions. Also removes
unnecessary types in output patterns.

Differential Revision: https://reviews.llvm.org/D93771
This commit is contained in:
Thomas Lively 2020-12-28 13:59:23 -08:00
parent 0f2c180163
commit 44ee14f993
2 changed files with 383 additions and 452 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

833
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
View File

File diff suppressed because it is too large Load Diff

2
llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
View File

@ -123,7 +123,7 @@ static void convertImplicitDefToConstZero(MachineInstr *MI,
} else if (RegClass == &WebAssembly::V128RegClass) {
// TODO: Replace this with v128.const 0 once that is supported in V8
Register TempReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
MI->setDesc(TII->get(WebAssembly::SPLAT_v4i32));
MI->setDesc(TII->get(WebAssembly::SPLAT_I32x4));
MI->addOperand(MachineOperand::CreateReg(TempReg, false));
MachineInstr *Const = BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
TII->get(WebAssembly::CONST_I32), TempReg)