From 4496eb0b096452abfdb860eabf15fb8fec8277ec Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Fri, 27 Jun 2014 00:18:25 +0000 Subject: [PATCH] Have HexagonSelectionDAGInfo take a DataLayout rather than a target machine since that's all it needs. llvm-svn: 211822 --- llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp | 4 ++-- llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h | 4 +--- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 +- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp index f66ffd284a93..b5db997eb1b8 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp @@ -18,8 +18,8 @@ using namespace llvm; bool llvm::flag_aligned_memcpy; -HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine &TM) - : TargetSelectionDAGInfo(TM.getDataLayout()) {} +HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const DataLayout &DL) + : TargetSelectionDAGInfo(&DL) {} HexagonSelectionDAGInfo::~HexagonSelectionDAGInfo() { } diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h index 8ba6108bdfad..b40b30320cf1 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h @@ -18,11 +18,9 @@ namespace llvm { -class HexagonTargetMachine; - class HexagonSelectionDAGInfo : public TargetSelectionDAGInfo { public: - explicit HexagonSelectionDAGInfo(const HexagonTargetMachine &TM); + explicit HexagonSelectionDAGInfo(const DataLayout &DL); ~HexagonSelectionDAGInfo(); SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index 35cf253f0ba1..40c06f61fd53 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -71,7 +71,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), DL("e-m:e-p:32:32-i1:32-i64:64-a:0-n32"), Subtarget(TT, CPU, FS), - InstrInfo(Subtarget), TLInfo(*this), TSInfo(*this), + InstrInfo(Subtarget), TLInfo(*this), TSInfo(DL), FrameLowering() { initAsmInfo(); }