forked from OSchip/llvm-project
Add AVX-512 feature flag and knl cpu to clang.
llvm-svn: 188758
This commit is contained in:
Craig Topper
parent
33b4cde2f2
commit
449314e1ec
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@ -1570,7 +1570,7 @@ const TargetInfo::AddlRegName AddlRegNames[] = {
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// most of the implementation can be shared.
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class X86TargetInfo : public TargetInfo {
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enum X86SSEEnum {
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NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
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NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512
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} SSELevel;
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enum MMX3DNowEnum {
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NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
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@ -1675,6 +1675,10 @@ class X86TargetInfo : public TargetInfo {
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CK_CoreAVX2,
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//@}
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/// \name Knights Landing
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/// Knights Landing processor.
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CK_KNL,
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/// \name K6
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/// K6 architecture processors.
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//@{
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@ -1818,6 +1822,7 @@ public:
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.Case("corei7-avx", CK_Corei7AVX)
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.Case("core-avx-i", CK_CoreAVXi)
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.Case("core-avx2", CK_CoreAVX2)
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.Case("knl", CK_KNL)
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.Case("k6", CK_K6)
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.Case("k6-2", CK_K6_2)
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.Case("k6-3", CK_K6_3)
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@ -1892,6 +1897,7 @@ public:
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case CK_Corei7AVX:
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case CK_CoreAVXi:
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case CK_CoreAVX2:
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case CK_KNL:
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case CK_Athlon64:
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case CK_Athlon64SSE3:
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case CK_AthlonFX:
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@ -1941,6 +1947,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
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Features["pclmul"] = false;
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Features["avx"] = false;
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Features["avx2"] = false;
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Features["avx512"] = false;
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Features["lzcnt"] = false;
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Features["rdrand"] = false;
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Features["bmi"] = false;
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@ -2024,6 +2031,18 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
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setFeatureEnabled(Features, "rtm", true);
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setFeatureEnabled(Features, "fma", true);
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break;
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case CK_KNL:
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setFeatureEnabled(Features, "avx512", true);
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setFeatureEnabled(Features, "aes", true);
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setFeatureEnabled(Features, "pclmul", true);
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setFeatureEnabled(Features, "lzcnt", true);
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setFeatureEnabled(Features, "rdrnd", true);
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setFeatureEnabled(Features, "f16c", true);
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setFeatureEnabled(Features, "bmi", true);
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setFeatureEnabled(Features, "bmi2", true);
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setFeatureEnabled(Features, "rtm", true);
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setFeatureEnabled(Features, "fma", true);
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break;
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case CK_K6:
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case CK_WinChipC6:
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setFeatureEnabled(Features, "mmx", true);
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@ -2149,6 +2168,11 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
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Features["ssse3"] = Features["sse41"] = Features["sse42"] =
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Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
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else if (Name == "avx512")
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Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
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Features["ssse3"] = Features["sse41"] = Features["sse42"] =
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Features["popcnt"] = Features["avx"] = Features["avx2"] =
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Features["avx512"] = true;
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else if (Name == "fma")
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Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
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Features["ssse3"] = Features["sse41"] = Features["sse42"] =
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@ -2191,28 +2215,29 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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Features["sse"] = Features["sse2"] = Features["sse3"] =
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Features["ssse3"] = Features["sse41"] = Features["sse42"] =
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Features["sse4a"] = Features["avx"] = Features["avx2"] =
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Features["fma"] = Features["fma4"] = Features["aes"] =
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Features["pclmul"] = Features["xop"] = false;
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Features["avx512"] = Features["fma"] = Features["fma4"] =
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Features["aes"] = Features["pclmul"] = Features["xop"] = false;
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else if (Name == "sse2")
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Features["sse2"] = Features["sse3"] = Features["ssse3"] =
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Features["sse41"] = Features["sse42"] = Features["sse4a"] =
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Features["avx"] = Features["avx2"] = Features["fma"] =
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Features["fma4"] = Features["aes"] = Features["pclmul"] =
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Features["xop"] = false;
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Features["avx"] = Features["avx2"] = Features["avx512"] =
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Features["fma"] = Features["fma4"] = Features["aes"] =
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Features["pclmul"] = Features["xop"] = false;
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else if (Name == "sse3")
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Features["sse3"] = Features["ssse3"] = Features["sse41"] =
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Features["sse42"] = Features["sse4a"] = Features["avx"] =
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Features["avx2"] = Features["fma"] = Features["fma4"] =
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Features["xop"] = false;
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Features["avx2"] = Features["avx512"] = Features["fma"] =
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Features["fma4"] = Features["xop"] = false;
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else if (Name == "ssse3")
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Features["ssse3"] = Features["sse41"] = Features["sse42"] =
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Features["avx"] = Features["avx2"] = Features["fma"] = false;
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Features["avx"] = Features["avx2"] = Features["avx512"] =
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Features["fma"] = false;
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else if (Name == "sse4" || Name == "sse4.1")
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Features["sse41"] = Features["sse42"] = Features["avx"] =
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Features["avx2"] = Features["fma"] = false;
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Features["avx2"] = Features["avx512"] = Features["fma"] = false;
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else if (Name == "sse4.2")
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Features["sse42"] = Features["avx"] = Features["avx2"] =
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Features["fma"] = false;
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Features["avx512"] = Features["fma"] = false;
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else if (Name == "3dnow")
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Features["3dnow"] = Features["3dnowa"] = false;
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else if (Name == "3dnowa")
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@ -2222,10 +2247,12 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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else if (Name == "pclmul")
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Features["pclmul"] = false;
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else if (Name == "avx")
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Features["avx"] = Features["avx2"] = Features["fma"] =
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Features["fma4"] = Features["xop"] = false;
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Features["avx"] = Features["avx2"] = Features["avx512"] =
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Features["fma"] = Features["fma4"] = Features["xop"] = false;
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else if (Name == "avx2")
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Features["avx2"] = false;
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Features["avx2"] = Features["avx512"] = false;
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else if (Name == "avx512")
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Features["avx512"] = false;
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else if (Name == "fma")
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Features["fma"] = false;
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else if (Name == "sse4a")
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@ -2345,6 +2372,7 @@ void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
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assert(Features[i][0] == '+' && "Invalid target feature!");
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X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
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.Case("avx512", AVX512)
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.Case("avx2", AVX2)
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.Case("avx", AVX)
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.Case("sse42", SSE42)
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@ -2455,6 +2483,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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case CK_CoreAVX2:
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defineCPUMacros(Builder, "corei7");
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break;
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case CK_KNL:
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defineCPUMacros(Builder, "knl");
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break;
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case CK_K6_2:
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Builder.defineMacro("__k6_2__");
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Builder.defineMacro("__tune_k6_2__");
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@ -2568,6 +2599,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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// Each case falls through to the previous one here.
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switch (SSELevel) {
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case AVX512:
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Builder.defineMacro("__AVX512__");
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case AVX2:
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Builder.defineMacro("__AVX2__");
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case AVX:
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@ -2592,6 +2625,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
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switch (SSELevel) {
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case AVX512:
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case AVX2:
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case AVX:
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case SSE42:
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@ -2635,6 +2669,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
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.Case("aes", HasAES)
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.Case("avx", SSELevel >= AVX)
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.Case("avx2", SSELevel >= AVX2)
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.Case("avx512", SSELevel >= AVX512)
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.Case("bmi", HasBMI)
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.Case("bmi2", HasBMI2)
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.Case("fma", HasFMA)
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@ -509,6 +509,7 @@
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// RUN: -target i386-unknown-linux \
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// RUN: | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M32
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// CHECK_CORE_AVX2_M32: #define __AES__ 1
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// CHECK_CORE_AVX2_M32: #define __AVX2__ 1
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// CHECK_CORE_AVX2_M32: #define __AVX__ 1
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// CHECK_CORE_AVX2_M32: #define __BMI2__ 1
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// CHECK_CORE_AVX2_M32: #define __BMI__ 1
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@ -536,6 +537,7 @@
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// RUN: -target i386-unknown-linux \
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// RUN: | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M64
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// CHECK_CORE_AVX2_M64: #define __AES__ 1
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// CHECK_CORE_AVX2_M64: #define __AVX2__ 1
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// CHECK_CORE_AVX2_M64: #define __AVX__ 1
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// CHECK_CORE_AVX2_M64: #define __BMI2__ 1
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// CHECK_CORE_AVX2_M64: #define __BMI__ 1
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@ -563,6 +565,68 @@
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// CHECK_CORE_AVX2_M64: #define __x86_64 1
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// CHECK_CORE_AVX2_M64: #define __x86_64__ 1
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//
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// RUN: %clang -march=knl -m32 -E -dM %s -o - 2>&1 \
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// RUN: -target i386-unknown-linux \
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// RUN: | FileCheck %s -check-prefix=CHECK_KNL_M32
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// CHECK_KNL_M32: #define __AES__ 1
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// CHECK_KNL_M32: #define __AVX2__ 1
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// CHECK_KNL_M32: #define __AVX512__ 1
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// CHECK_KNL_M32: #define __AVX__ 1
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// CHECK_KNL_M32: #define __BMI2__ 1
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// CHECK_KNL_M32: #define __BMI__ 1
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// CHECK_KNL_M32: #define __F16C__ 1
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// CHECK_KNL_M32: #define __FMA__ 1
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// CHECK_KNL_M32: #define __LZCNT__ 1
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// CHECK_KNL_M32: #define __MMX__ 1
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// CHECK_KNL_M32: #define __PCLMUL__ 1
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// CHECK_KNL_M32: #define __POPCNT__ 1
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// CHECK_KNL_M32: #define __RDRND__ 1
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// CHECK_KNL_M32: #define __RTM__ 1
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// CHECK_KNL_M32: #define __SSE2__ 1
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// CHECK_KNL_M32: #define __SSE3__ 1
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// CHECK_KNL_M32: #define __SSE4_1__ 1
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// CHECK_KNL_M32: #define __SSE4_2__ 1
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// CHECK_KNL_M32: #define __SSE__ 1
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// CHECK_KNL_M32: #define __SSSE3__ 1
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// CHECK_KNL_M32: #define __i386 1
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// CHECK_KNL_M32: #define __i386__ 1
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// CHECK_KNL_M32: #define __knl 1
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// CHECK_KNL_M32: #define __knl__ 1
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// CHECK_KNL_M32: #define __tune_knl__ 1
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// CHECK_KNL_M32: #define i386 1
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// RUN: %clang -march=knl -m64 -E -dM %s -o - 2>&1 \
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// RUN: -target i386-unknown-linux \
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// RUN: | FileCheck %s -check-prefix=CHECK_KNL_M64
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// CHECK_KNL_M64: #define __AES__ 1
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// CHECK_KNL_M64: #define __AVX2__ 1
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// CHECK_KNL_M64: #define __AVX512__ 1
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// CHECK_KNL_M64: #define __AVX__ 1
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// CHECK_KNL_M64: #define __BMI2__ 1
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// CHECK_KNL_M64: #define __BMI__ 1
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// CHECK_KNL_M64: #define __F16C__ 1
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// CHECK_KNL_M64: #define __FMA__ 1
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// CHECK_KNL_M64: #define __LZCNT__ 1
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// CHECK_KNL_M64: #define __MMX__ 1
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// CHECK_KNL_M64: #define __PCLMUL__ 1
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// CHECK_KNL_M64: #define __POPCNT__ 1
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// CHECK_KNL_M64: #define __RDRND__ 1
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// CHECK_KNL_M64: #define __RTM__ 1
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// CHECK_KNL_M64: #define __SSE2_MATH__ 1
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// CHECK_KNL_M64: #define __SSE2__ 1
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// CHECK_KNL_M64: #define __SSE3__ 1
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// CHECK_KNL_M64: #define __SSE4_1__ 1
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// CHECK_KNL_M64: #define __SSE4_2__ 1
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// CHECK_KNL_M64: #define __SSE_MATH__ 1
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// CHECK_KNL_M64: #define __SSE__ 1
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// CHECK_KNL_M64: #define __SSSE3__ 1
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// CHECK_KNL_M64: #define __amd64 1
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// CHECK_KNL_M64: #define __amd64__ 1
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// CHECK_KNL_M64: #define __knl 1
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// CHECK_KNL_M64: #define __knl__ 1
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// CHECK_KNL_M64: #define __tune_knl__ 1
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// CHECK_KNL_M64: #define __x86_64 1
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// CHECK_KNL_M64: #define __x86_64__ 1
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//
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// RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
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// RUN: -target i386-unknown-linux \
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// RUN: | FileCheck %s -check-prefix=CHECK_ATOM_M32
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