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[X86] concatSubVectors - remove unnecessary args. NFCI. 

All these args can be cheaply recomputed and it makes it much easier to use the function as a quick helper.

llvm-svn: 367014
This commit is contained in:
Simon Pilgrim 2019-07-25 13:05:46 +00:00
parent f34da181d2
commit 447fe31964
1 changed files with 12 additions and 9 deletions
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21
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -5721,11 +5721,16 @@ static SDValue insert1BitVector(SDValue Op, SelectionDAG &DAG,
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx);
}
static SDValue concatSubVectors(SDValue V1, SDValue V2, EVT VT,
unsigned NumElems, SelectionDAG &DAG,
const SDLoc &dl, unsigned VectorWidth) {
SDValue V = insertSubVector(DAG.getUNDEF(VT), V1, 0, DAG, dl, VectorWidth);
return insertSubVector(V, V2, NumElems / 2, DAG, dl, VectorWidth);
static SDValue concatSubVectors(SDValue V1, SDValue V2, SelectionDAG &DAG,
const SDLoc &dl) {
assert(V1.getValueType() == V2.getValueType() && "subvector type mismatch");
EVT SubVT = V1.getValueType();
EVT SubSVT = SubVT.getScalarType();
unsigned SubNumElts = SubVT.getVectorNumElements();
unsigned SubVectorWidth = SubVT.getSizeInBits();
EVT VT = EVT::getVectorVT(*DAG.getContext(), SubSVT, 2 * SubNumElts);
SDValue V = insertSubVector(DAG.getUNDEF(VT), V1, 0, DAG, dl, SubVectorWidth);
return insertSubVector(V, V2, SubNumElts, DAG, dl, SubVectorWidth);
}
/// Returns a vector of specified type with all bits set.
@ -9633,8 +9638,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
HVT, dl, Op->ops().slice(NumElems / 2, NumElems /2));
// Recreate the wider vector with the lower and upper part.
return concatSubVectors(Lower, Upper, VT, NumElems, DAG, dl,
VT.getSizeInBits() / 2);
return concatSubVectors(Lower, Upper, DAG, dl);
}
// Let legalizer expand 2-wide build_vectors.
@ -42222,12 +42226,11 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
VT.getScalarSizeInBits() == N0.getOperand(0).getScalarValueSizeInBits()) {
SDValue N00 = N0.getOperand(0);
SDValue N01 = N0.getOperand(1);
unsigned NumSrcElts = N00.getValueType().getVectorNumElements();
unsigned NumSrcEltBits = N00.getScalarValueSizeInBits();
APInt ZeroMask = APInt::getHighBitsSet(NumSrcEltBits, NumSrcEltBits / 2);
if ((N00.isUndef() || DAG.MaskedValueIsZero(N00, ZeroMask)) &&
(N01.isUndef() || DAG.MaskedValueIsZero(N01, ZeroMask))) {
return concatSubVectors(N00, N01, VT, NumSrcElts * 2, DAG, dl, 128);
return concatSubVectors(N00, N01, DAG, dl);
}
}