forked from OSchip/llvm-project
[VPlan] Use vector.body as header name in VPlan native path.
This brings the VPlan block naming in line with the naming of the generated basic blocks.
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@ -264,6 +264,7 @@ VPRegionBlock *PlainCFGBuilder::buildPlainCFG() {
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}
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// Create empty VPBB for Loop H so that we can link PH->H.
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VPBlockBase *HeaderVPBB = getOrCreateVPBB(TheLoop->getHeader());
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HeaderVPBB->setName("vector.body");
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// Preheader's predecessors will be set during the loop RPO traversal below.
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PreheaderVPBB->setOneSuccessor(HeaderVPBB);
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@ -106,11 +106,11 @@ compound=true
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label="\<x1\> TopRegion"
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N1 [label =
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"entry:\l" +
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"Successor(s): for.body\l"
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"Successor(s): vector.body\l"
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]
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N1 -> N2 [ label=""]
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N2 [label =
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"for.body:\l" +
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"vector.body:\l" +
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" WIDEN-PHI ir\<%indvars.iv\> = phi ir\<0\>, ir\<%indvars.iv.next\>\l" +
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" EMIT ir\<%arr.idx\> = getelementptr ir\<%A\> ir\<%indvars.iv\>\l" +
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" EMIT ir\<%l1\> = load ir\<%arr.idx\>\l" +
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@ -118,8 +118,8 @@ compound=true
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" EMIT store ir\<%res\> ir\<%arr.idx\>\l" +
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" EMIT ir\<%indvars.iv.next\> = add ir\<%indvars.iv\> ir\<1\>\l" +
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" EMIT ir\<%exitcond\> = icmp ir\<%indvars.iv.next\> ir\<%N\>\l" +
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"Successor(s): for.body, for.end\l" +
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"CondBit: ir\<%exitcond\> (for.body)\l"
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"Successor(s): vector.body, for.end\l" +
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"CondBit: ir\<%exitcond\> (vector.body)\l"
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]
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N2 -> N2 [ label="T"]
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N2 -> N3 [ label="F"]
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