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[X86] Use the same itinerary for VCVTDQ2PD as the SSE version so that the generated scheduler classes will merge. 

llvm-svn: 328470
This commit is contained in:
Craig Topper 2018-03-26 02:17:14 +00:00
parent 659f85af14
commit 4367874bc5
1 changed files with 10 additions and 8 deletions
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18
llvm/lib/Target/X86/X86InstrSSE.td
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@ -2016,23 +2016,25 @@ let hasSideEffects = 0, mayLoad = 1 in
def VCVTDQ2PDrm : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), def VCVTDQ2PDrm : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
"vcvtdq2pd\t{$src, $dst|$dst, $src}", "vcvtdq2pd\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, [(set VR128:$dst,
(v2f64 (X86VSintToFP (bc_v4i32 (loadv2i64 addr:$src)))))]>, (v2f64 (X86VSintToFP (bc_v4i32 (loadv2i64 addr:$src)))))],
VEX, Sched<[WriteCvtI2FLd]>, VEX_WIG; IIC_SSE_CVT_PD_RM>, VEX, Sched<[WriteCvtI2FLd]>, VEX_WIG;
def VCVTDQ2PDrr : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), def VCVTDQ2PDrr : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
"vcvtdq2pd\t{$src, $dst|$dst, $src}", "vcvtdq2pd\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, [(set VR128:$dst,
(v2f64 (X86VSintToFP (v4i32 VR128:$src))))]>, (v2f64 (X86VSintToFP (v4i32 VR128:$src))))],
VEX, Sched<[WriteCvtI2F]>, VEX_WIG; IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtI2F]>, VEX_WIG;
def VCVTDQ2PDYrm : S2SI<0xE6, MRMSrcMem, (outs VR256:$dst), (ins i128mem:$src), def VCVTDQ2PDYrm : S2SI<0xE6, MRMSrcMem, (outs VR256:$dst), (ins i128mem:$src),
"vcvtdq2pd\t{$src, $dst|$dst, $src}", "vcvtdq2pd\t{$src, $dst|$dst, $src}",
[(set VR256:$dst, [(set VR256:$dst,
(v4f64 (sint_to_fp (bc_v4i32 (loadv2i64 addr:$src)))))]>, (v4f64 (sint_to_fp (bc_v4i32 (loadv2i64 addr:$src)))))],
VEX, VEX_L, Sched<[WriteCvtI2FLd]>, VEX_WIG; IIC_SSE_CVT_PD_RM>, VEX, VEX_L, Sched<[WriteCvtI2FLd]>,
VEX_WIG;
def VCVTDQ2PDYrr : S2SI<0xE6, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src), def VCVTDQ2PDYrr : S2SI<0xE6, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
"vcvtdq2pd\t{$src, $dst|$dst, $src}", "vcvtdq2pd\t{$src, $dst|$dst, $src}",
[(set VR256:$dst, [(set VR256:$dst,
(v4f64 (sint_to_fp (v4i32 VR128:$src))))]>, (v4f64 (sint_to_fp (v4i32 VR128:$src))))],
VEX, VEX_L, Sched<[WriteCvtI2F]>, VEX_WIG; IIC_SSE_CVT_PD_RR>, VEX, VEX_L, Sched<[WriteCvtI2F]>,
VEX_WIG;
} }
let hasSideEffects = 0, mayLoad = 1 in let hasSideEffects = 0, mayLoad = 1 in