forked from OSchip/llvm-project
[X86] Use the same itinerary for VCVTDQ2PD as the SSE version so that the generated scheduler classes will merge.
llvm-svn: 328470
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@ -2016,23 +2016,25 @@ let hasSideEffects = 0, mayLoad = 1 in
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def VCVTDQ2PDrm : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
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"vcvtdq2pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2f64 (X86VSintToFP (bc_v4i32 (loadv2i64 addr:$src)))))]>,
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VEX, Sched<[WriteCvtI2FLd]>, VEX_WIG;
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(v2f64 (X86VSintToFP (bc_v4i32 (loadv2i64 addr:$src)))))],
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IIC_SSE_CVT_PD_RM>, VEX, Sched<[WriteCvtI2FLd]>, VEX_WIG;
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def VCVTDQ2PDrr : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
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"vcvtdq2pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2f64 (X86VSintToFP (v4i32 VR128:$src))))]>,
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VEX, Sched<[WriteCvtI2F]>, VEX_WIG;
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(v2f64 (X86VSintToFP (v4i32 VR128:$src))))],
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IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtI2F]>, VEX_WIG;
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def VCVTDQ2PDYrm : S2SI<0xE6, MRMSrcMem, (outs VR256:$dst), (ins i128mem:$src),
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"vcvtdq2pd\t{$src, $dst|$dst, $src}",
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[(set VR256:$dst,
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(v4f64 (sint_to_fp (bc_v4i32 (loadv2i64 addr:$src)))))]>,
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VEX, VEX_L, Sched<[WriteCvtI2FLd]>, VEX_WIG;
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(v4f64 (sint_to_fp (bc_v4i32 (loadv2i64 addr:$src)))))],
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IIC_SSE_CVT_PD_RM>, VEX, VEX_L, Sched<[WriteCvtI2FLd]>,
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VEX_WIG;
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def VCVTDQ2PDYrr : S2SI<0xE6, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
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"vcvtdq2pd\t{$src, $dst|$dst, $src}",
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[(set VR256:$dst,
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(v4f64 (sint_to_fp (v4i32 VR128:$src))))]>,
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VEX, VEX_L, Sched<[WriteCvtI2F]>, VEX_WIG;
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(v4f64 (sint_to_fp (v4i32 VR128:$src))))],
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IIC_SSE_CVT_PD_RR>, VEX, VEX_L, Sched<[WriteCvtI2F]>,
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VEX_WIG;
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}
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let hasSideEffects = 0, mayLoad = 1 in
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