forked from OSchip/llvm-project
[ELF][MIPS] Change format of output relocations to Elf_Rel
Initially LLD generates Elf_Rel relocations for O32 ABI and Elf_Rela relocations for N32 / N64 ABIs. In other words, format of input and output relocations was always the same. Now LLD generates all output relocations using Elf_Rel format only. It conforms to ABIs requirement. The patch suggested by Alexander Richardson. llvm-svn: 324064
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@ -813,7 +813,7 @@ static void setConfigs() {
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Config->IsLE ? support::endianness::little : support::endianness::big;
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Config->IsMips64EL = (Kind == ELF64LEKind && Machine == EM_MIPS);
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Config->IsRela =
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Config->Is64 || IsX32 || Config->MipsN32Abi || Machine == EM_PPC;
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(Config->Is64 || IsX32 || Machine == EM_PPC) && Machine != EM_MIPS;
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Config->Pic = Config->Pie || Config->Shared;
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Config->Wordsize = Config->Is64 ? 8 : 4;
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}
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@ -339,7 +339,7 @@ void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
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auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
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Buf += sizeof(RelTy);
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if (Config->IsRela)
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if (RelTy::IsRela)
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P->r_addend = getAddend<ELFT>(Rel);
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// Output section VA is zero for -r, so r_offset is an offset within the
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@ -369,7 +369,7 @@ void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
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continue;
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}
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if (Config->IsRela) {
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if (RelTy::IsRela) {
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P->r_addend =
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Sym.getVA(getAddend<ELFT>(Rel)) - Section->getOutputSection()->Addr;
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} else if (Config->Relocatable) {
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@ -30,17 +30,16 @@ v2:
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# SYM: 00020008 g .data 00000008 v2
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# CHECK: Relocations [
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# CHECK-NEXT: Section (7) .rela.dyn {
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# CHECK-NEXT: 0x20010 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x20000
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# ^-- v1
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# CHECK-NEXT: 0x20008 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE v2 0x8
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# CHECK-NEXT: Section (7) .rel.dyn {
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# CHECK-NEXT: 0x20010 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x0
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# CHECK-NEXT: 0x20008 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE v2 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK: DynamicSection [
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# CHECK: Tag Type Name/Value
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# CHECK: 0x0000000000000008 RELASZ 48 (bytes)
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# CHECK: 0x0000000000000009 RELAENT 24 (bytes)
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# CHECK: 0x0000000000000012 RELSZ 32 (bytes)
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# CHECK: 0x0000000000000013 RELENT 16 (bytes)
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# CHECK: Primary GOT {
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# CHECK-NEXT: Canonical gp value:
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@ -34,7 +34,7 @@
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# DIS: 0000000000000000 g *UND* 00000000 foo
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# CHECK: Relocations [
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# CHECK-NEXT: Section (7) .rela.dyn {
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# CHECK-NEXT: Section (7) .rel.dyn {
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# CHECK-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
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# CHECK-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
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# CHECK-NEXT: 0x30030 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
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@ -66,7 +66,7 @@
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# DIS-SO-NEXT: 20040 00000000 00000000 00000000 00000000
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# SO: Relocations [
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# SO-NEXT: Section (7) .rela.dyn {
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# SO-NEXT: Section (7) .rel.dyn {
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# SO-NEXT: 0x20028 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - 0x0
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# SO-NEXT: 0x20038 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar 0x0
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# SO-NEXT: 0x20040 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0
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@ -20,8 +20,8 @@
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# OBJ-NEXT: }
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# PIC-RELOCS: Relocations [
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# PIC-RELOCS-NEXT: Section (7) .rela.dyn {
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# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x10000
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# PIC-RELOCS-NEXT: Section (7) .rel.dyn {
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# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x0
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# PIC-RELOCS-NEXT: }
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# PIC-RELOCS-NEXT:]
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