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AMDGPU: Fix set but not used warnings related to AMDGPUAS 

Differential Revision: https://reviews.llvm.org/D39499

llvm-svn: 317114
This commit is contained in:
Konstantin Zhuravlyov 2017-11-01 19:12:38 +00:00
parent 87b42549ee
commit 435151ad75
7 changed files with 32 additions and 36 deletions
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2
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
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@ -226,7 +226,7 @@ void AMDGPUAsmPrinter::EmitFunctionEntryLabel() {
void AMDGPUAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
// Group segment variables aren't emitted in HSA.
if (AMDGPU::isGroupSegment(GV, AMDGPUASI))
if (AMDGPU::isGroupSegment(GV))
return;
AsmPrinter::EmitGlobalVariable(GV);

5
llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
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@ -91,7 +91,6 @@ static void collectCallers(Function *F, DenseSet<Function *> &Callers) {
bool AMDGPUOpenCLEnqueuedBlockLowering::runOnModule(Module &M) {
DenseSet<Function *> Callers;
auto &C = M.getContext();
auto AS = AMDGPU::getAMDGPUAS(M);
bool Changed = false;
for (auto &F : M.functions()) {
if (F.hasFnAttribute("enqueued-block")) {
@ -104,10 +103,10 @@ bool AMDGPUOpenCLEnqueuedBlockLowering::runOnModule(Module &M) {
auto *AddrCast = cast<ConstantExpr>(*BitCast->user_begin());
auto RuntimeHandle = (F.getName() + "_runtime_handle").str();
auto *GV = new GlobalVariable(
M, Type::getInt8Ty(C)->getPointerTo(AS.GLOBAL_ADDRESS),
M, Type::getInt8Ty(C)->getPointerTo(AMDGPUAS::GLOBAL_ADDRESS),
/*IsConstant=*/true, GlobalValue::ExternalLinkage,
/*Initializer=*/nullptr, RuntimeHandle, /*InsertBefore=*/nullptr,
GlobalValue::NotThreadLocal, AS.GLOBAL_ADDRESS,
GlobalValue::NotThreadLocal, AMDGPUAS::GLOBAL_ADDRESS,
/*IsExternallyInitialized=*/true);
DEBUG(dbgs() << "runtime handle created: " << *GV << '\n');
auto *NewPtr = ConstantExpr::getPointerCast(GV, AddrCast->getType());

3
llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
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@ -23,8 +23,7 @@ using namespace llvm;
MCSection *AMDGPUTargetObjectFile::SelectSectionForGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
auto AS = static_cast<const AMDGPUTargetMachine*>(&TM)->getAMDGPUAS();
if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GO, AS) &&
if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GO) &&
AMDGPU::shouldEmitConstantsToTextSection(TM.getTargetTriple()))
return TextSection;

37
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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@ -1308,39 +1308,39 @@ SDValue R600TargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
// return (512 + (kc_bank << 12)
static int
ConstantAddressBlock(unsigned AddressSpace, AMDGPUAS AMDGPUASI) {
ConstantAddressBlock(unsigned AddressSpace) {
switch (AddressSpace) {
case AMDGPUASI.CONSTANT_BUFFER_0:
case AMDGPUAS::CONSTANT_BUFFER_0:
return 512;
case AMDGPUASI.CONSTANT_BUFFER_1:
case AMDGPUAS::CONSTANT_BUFFER_1:
return 512 + 4096;
case AMDGPUASI.CONSTANT_BUFFER_2:
case AMDGPUAS::CONSTANT_BUFFER_2:
return 512 + 4096 * 2;
case AMDGPUASI.CONSTANT_BUFFER_3:
case AMDGPUAS::CONSTANT_BUFFER_3:
return 512 + 4096 * 3;
case AMDGPUASI.CONSTANT_BUFFER_4:
case AMDGPUAS::CONSTANT_BUFFER_4:
return 512 + 4096 * 4;
case AMDGPUASI.CONSTANT_BUFFER_5:
case AMDGPUAS::CONSTANT_BUFFER_5:
return 512 + 4096 * 5;
case AMDGPUASI.CONSTANT_BUFFER_6:
case AMDGPUAS::CONSTANT_BUFFER_6:
return 512 + 4096 * 6;
case AMDGPUASI.CONSTANT_BUFFER_7:
case AMDGPUAS::CONSTANT_BUFFER_7:
return 512 + 4096 * 7;
case AMDGPUASI.CONSTANT_BUFFER_8:
case AMDGPUAS::CONSTANT_BUFFER_8:
return 512 + 4096 * 8;
case AMDGPUASI.CONSTANT_BUFFER_9:
case AMDGPUAS::CONSTANT_BUFFER_9:
return 512 + 4096 * 9;
case AMDGPUASI.CONSTANT_BUFFER_10:
case AMDGPUAS::CONSTANT_BUFFER_10:
return 512 + 4096 * 10;
case AMDGPUASI.CONSTANT_BUFFER_11:
case AMDGPUAS::CONSTANT_BUFFER_11:
return 512 + 4096 * 11;
case AMDGPUASI.CONSTANT_BUFFER_12:
case AMDGPUAS::CONSTANT_BUFFER_12:
return 512 + 4096 * 12;
case AMDGPUASI.CONSTANT_BUFFER_13:
case AMDGPUAS::CONSTANT_BUFFER_13:
return 512 + 4096 * 13;
case AMDGPUASI.CONSTANT_BUFFER_14:
case AMDGPUAS::CONSTANT_BUFFER_14:
return 512 + 4096 * 14;
case AMDGPUASI.CONSTANT_BUFFER_15:
case AMDGPUAS::CONSTANT_BUFFER_15:
return 512 + 4096 * 15;
default:
return -1;
@ -1424,8 +1424,7 @@ SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
return scalarizeVectorLoad(LoadNode, DAG);
}
int ConstantBlock = ConstantAddressBlock(LoadNode->getAddressSpace(),
AMDGPUASI);
int ConstantBlock = ConstantAddressBlock(LoadNode->getAddressSpace());
if (ConstantBlock > -1 &&
((LoadNode->getExtensionType() == ISD::NON_EXTLOAD) ||
(LoadNode->getExtensionType() == ISD::ZEXTLOAD))) {

3
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
View File

@ -369,7 +369,6 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const SISubtarget &ST,
const SIInstrInfo *TII = ST.getInstrInfo();
const SIRegisterInfo *TRI = &TII->getRegisterInfo();
DebugLoc DL;
auto AMDGPUASI = ST.getAMDGPUAS();
if (ST.isAmdPalOS()) {
// The pointer to the GIT is formed from the offset passed in and either
@ -437,7 +436,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const SISubtarget &ST,
PointerType *PtrTy =
PointerType::get(Type::getInt64Ty(MF.getFunction()->getContext()),
AMDGPUASI.CONSTANT_ADDRESS);
AMDGPUAS::CONSTANT_ADDRESS);
MachinePointerInfo PtrInfo(UndefValue::get(PtrTy));
auto MMO = MF.getMachineMemOperand(PtrInfo,
MachineMemOperand::MOLoad |

12
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
View File

@ -356,16 +356,16 @@ void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header,
Header.private_segment_alignment = 4;
}
bool isGroupSegment(const GlobalValue *GV, AMDGPUAS AS) {
return GV->getType()->getAddressSpace() == AS.LOCAL_ADDRESS;
bool isGroupSegment(const GlobalValue *GV) {
return GV->getType()->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
}
bool isGlobalSegment(const GlobalValue *GV, AMDGPUAS AS) {
return GV->getType()->getAddressSpace() == AS.GLOBAL_ADDRESS;
bool isGlobalSegment(const GlobalValue *GV) {
return GV->getType()->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
}
bool isReadOnlySegment(const GlobalValue *GV, AMDGPUAS AS) {
return GV->getType()->getAddressSpace() == AS.CONSTANT_ADDRESS;
bool isReadOnlySegment(const GlobalValue *GV) {
return GV->getType()->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS;
}
bool shouldEmitConstantsToTextSection(const Triple &TT) {

6
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
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@ -159,9 +159,9 @@ int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx);
void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header,
const FeatureBitset &Features);
bool isGroupSegment(const GlobalValue *GV, AMDGPUAS AS);
bool isGlobalSegment(const GlobalValue *GV, AMDGPUAS AS);
bool isReadOnlySegment(const GlobalValue *GV, AMDGPUAS AS);
bool isGroupSegment(const GlobalValue *GV);
bool isGlobalSegment(const GlobalValue *GV);
bool isReadOnlySegment(const GlobalValue *GV);
/// \returns True if constants should be emitted to .text section for given
/// target triple \p TT, false otherwise.