forked from OSchip/llvm-project
[hwasan] Fix inline instrumentation.
This patch changes hwasan inline instrumentation: Fixes address untagging for shadow address calculation (use 0xFF instead of 0x00 for the top byte). Emits brk instruction instead of hlt for the kernel and user space. Use 0x900 instead of 0x100 for brk immediate (0x100 - 0x800 are unavailable in the kernel). Fixes and adds appropriate tests. Patch by Andrey Konovalov. Differential Revision: https://reviews.llvm.org/D43135 llvm-svn: 325711
This commit is contained in:
parent
b3568ec928
commit
43271b1803
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@ -84,7 +84,7 @@ static void InitializeFlags() {
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cf.check_printf = false;
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cf.intercept_tls_get_addr = true;
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cf.exitcode = 99;
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cf.handle_sigill = kHandleSignalExclusive;
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cf.handle_sigtrap = kHandleSignalExclusive;
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OverrideCommonFlags(cf);
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}
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@ -240,9 +240,9 @@ void __sanitizer_unaligned_store64(uu64 *p, u64 x) {
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template<unsigned X>
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__attribute__((always_inline))
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static void SigIll() {
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static void SigTrap() {
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#if defined(__aarch64__)
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asm("hlt %0\n\t" ::"n"(X));
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asm("brk %0\n\t" ::"n"(X));
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#elif defined(__x86_64__) || defined(__i386__)
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asm("ud2\n\t");
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#else
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@ -261,7 +261,7 @@ __attribute__((always_inline, nodebug)) static void CheckAddress(uptr p) {
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uptr ptr_raw = p & ~kAddressTagMask;
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tag_t mem_tag = *(tag_t *)MEM_TO_SHADOW(ptr_raw);
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if (UNLIKELY(ptr_tag != mem_tag)) {
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SigIll<0x100 + 0x20 * (EA == ErrorAction::Recover) +
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SigTrap<0x900 + 0x20 * (EA == ErrorAction::Recover) +
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0x10 * (AT == AccessType::Store) + LogSize>();
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if (EA == ErrorAction::Abort) __builtin_unreachable();
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}
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@ -277,7 +277,7 @@ __attribute__((always_inline, nodebug)) static void CheckAddressSized(uptr p,
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tag_t *shadow_last = (tag_t *)MEM_TO_SHADOW(ptr_raw + sz - 1);
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for (tag_t *t = shadow_first; t <= shadow_last; ++t)
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if (UNLIKELY(ptr_tag != *t)) {
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SigIll<0x100 + 0x20 * (EA == ErrorAction::Recover) +
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SigTrap<0x900 + 0x20 * (EA == ErrorAction::Recover) +
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0x10 * (AT == AccessType::Store) + 0xf>();
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if (EA == ErrorAction::Abort) __builtin_unreachable();
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}
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@ -188,7 +188,7 @@ struct AccessInfo {
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#if defined(__aarch64__)
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static AccessInfo GetAccessInfo(siginfo_t *info, ucontext_t *uc) {
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// Access type is encoded in HLT immediate as 0x1XY,
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// Access type is encoded in BRK immediate as 0x9XY,
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// where X&1 is 1 for store, 0 for load,
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// and X&2 is 1 if the error is recoverable.
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// Valid values of Y are 0 to 4, which are interpreted as log2(access_size),
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@ -197,7 +197,7 @@ static AccessInfo GetAccessInfo(siginfo_t *info, ucontext_t *uc) {
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AccessInfo ai;
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uptr pc = (uptr)info->si_addr;
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unsigned code = ((*(u32 *)pc) >> 5) & 0xffff;
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if ((code & 0xff00) != 0x100)
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if ((code & 0xff00) != 0x900)
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return AccessInfo{0, 0, false, false}; // Not ours.
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bool is_store = code & 0x10;
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bool recover = code & 0x20;
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@ -221,7 +221,7 @@ static AccessInfo GetAccessInfo(siginfo_t *info, ucontext_t *uc) {
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}
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#endif
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static bool HwasanOnSIGILL(int signo, siginfo_t *info, ucontext_t *uc) {
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static bool HwasanOnSIGTRAP(int signo, siginfo_t *info, ucontext_t *uc) {
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SignalContext sig{info, uc};
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AccessInfo ai = GetAccessInfo(info, uc);
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if (!ai.is_store && !ai.is_load)
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@ -251,8 +251,8 @@ static void OnStackUnwind(const SignalContext &sig, const void *,
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void HwasanOnDeadlySignal(int signo, void *info, void *context) {
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// Probably a tag mismatch.
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if (signo == SIGILL)
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if (HwasanOnSIGILL(signo, (siginfo_t *)info, (ucontext_t*)context))
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if (signo == SIGTRAP)
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if (HwasanOnSIGTRAP(signo, (siginfo_t *)info, (ucontext_t*)context))
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return;
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HandleDeadlySignal(info, context, GetTid(), &OnStackUnwind, nullptr);
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@ -93,6 +93,8 @@ COMMON_FLAG(HandleSignalMode, handle_abort, kHandleSignalNo,
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COMMON_FLAG_HANDLE_SIGNAL_HELP(SIGABRT))
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COMMON_FLAG(HandleSignalMode, handle_sigill, kHandleSignalNo,
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COMMON_FLAG_HANDLE_SIGNAL_HELP(SIGILL))
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COMMON_FLAG(HandleSignalMode, handle_sigtrap, kHandleSignalNo,
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COMMON_FLAG_HANDLE_SIGNAL_HELP(SIGTRAP))
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COMMON_FLAG(HandleSignalMode, handle_sigfpe, kHandleSignalYes,
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COMMON_FLAG_HANDLE_SIGNAL_HELP(SIGFPE))
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#undef COMMON_FLAG_HANDLE_SIGNAL_HELP
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@ -1618,6 +1618,8 @@ static HandleSignalMode GetHandleSignalModeImpl(int signum) {
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return common_flags()->handle_abort;
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case SIGILL:
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return common_flags()->handle_sigill;
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case SIGTRAP:
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return common_flags()->handle_sigtrap;
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case SIGFPE:
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return common_flags()->handle_sigfpe;
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case SIGSEGV:
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@ -435,6 +435,8 @@ static HandleSignalMode GetHandleSignalModeImpl(int signum) {
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return common_flags()->handle_abort;
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case SIGILL:
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return common_flags()->handle_sigill;
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case SIGTRAP:
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return common_flags()->handle_sigtrap;
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case SIGFPE:
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return common_flags()->handle_sigfpe;
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case SIGSEGV:
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@ -218,6 +218,7 @@ void InstallDeadlySignalHandlers(SignalHandlerType handler) {
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MaybeInstallSigaction(SIGABRT, handler);
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MaybeInstallSigaction(SIGFPE, handler);
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MaybeInstallSigaction(SIGILL, handler);
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MaybeInstallSigaction(SIGTRAP, handler);
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}
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bool SignalContext::IsStackOverflow() const {
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@ -134,6 +134,7 @@ public:
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bool isInterestingAlloca(const AllocaInst &AI);
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bool tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag);
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Value *tagPointer(IRBuilder<> &IRB, Type *Ty, Value *PtrLong, Value *Tag);
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Value *untagPointer(IRBuilder<> &IRB, Value *PtrLong);
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bool instrumentStack(SmallVectorImpl<AllocaInst *> &Allocas,
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SmallVectorImpl<Instruction *> &RetVec);
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Value *getNextTagWithCall(IRBuilder<> &IRB);
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@ -291,9 +292,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *PtrLong, bool IsWrite,
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Instruction *InsertBefore) {
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IRBuilder<> IRB(InsertBefore);
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Value *PtrTag = IRB.CreateTrunc(IRB.CreateLShr(PtrLong, kPointerTagShift), IRB.getInt8Ty());
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Value *AddrLong =
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IRB.CreateAnd(PtrLong, ConstantInt::get(PtrLong->getType(),
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~(0xFFULL << kPointerTagShift)));
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Value *AddrLong = untagPointer(IRB, PtrLong);
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Value *ShadowLong = IRB.CreateLShr(AddrLong, kShadowScale);
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if (ClMappingOffset)
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ShadowLong = IRB.CreateAdd(
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@ -311,8 +310,8 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *PtrLong, bool IsWrite,
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// The signal handler will find the data address in x0.
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InlineAsm *Asm = InlineAsm::get(
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FunctionType::get(IRB.getVoidTy(), {PtrLong->getType()}, false),
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"hlt #" +
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itostr(0x100 + Recover * 0x20 + IsWrite * 0x10 + AccessSizeIndex),
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"brk #" +
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itostr(0x900 + Recover * 0x20 + IsWrite * 0x10 + AccessSizeIndex),
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"{x0}",
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/*hasSideEffects=*/true);
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IRB.CreateCall(Asm, PtrLong);
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@ -461,6 +460,21 @@ Value *HWAddressSanitizer::tagPointer(IRBuilder<> &IRB, Type *Ty, Value *PtrLong
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return IRB.CreateIntToPtr(TaggedPtrLong, Ty);
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}
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// Remove tag from an address.
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Value *HWAddressSanitizer::untagPointer(IRBuilder<> &IRB, Value *PtrLong) {
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Value *UntaggedPtrLong;
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if (ClEnableKhwasan) {
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// Kernel addresses have 0xFF in the most significant byte.
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UntaggedPtrLong = IRB.CreateOr(PtrLong,
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ConstantInt::get(PtrLong->getType(), 0xFFULL << kPointerTagShift));
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} else {
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// Userspace addresses have 0x00.
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UntaggedPtrLong = IRB.CreateAnd(PtrLong,
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ConstantInt::get(PtrLong->getType(), ~(0xFFULL << kPointerTagShift)));
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}
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return UntaggedPtrLong;
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}
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bool HWAddressSanitizer::instrumentStack(
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SmallVectorImpl<AllocaInst *> &Allocas,
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SmallVectorImpl<Instruction *> &RetVec) {
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@ -8,7 +8,7 @@ target triple = "aarch64--linux-android"
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define void @atomicrmw(i64* %ptr) sanitize_hwaddress {
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; CHECK-LABEL: @atomicrmw(
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; CHECK: lshr i64 %[[A:[^ ]*]], 56
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; CHECK: call void asm sideeffect "hlt #275", "{x0}"(i64 %[[A]])
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; CHECK: call void asm sideeffect "brk #2323", "{x0}"(i64 %[[A]])
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; CHECK: atomicrmw add i64* %ptr, i64 1 seq_cst
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; CHECK: ret void
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@ -20,7 +20,7 @@ entry:
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define void @cmpxchg(i64* %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
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; CHECK-LABEL: @cmpxchg(
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; CHECK: lshr i64 %[[A:[^ ]*]], 56
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; CHECK: call void asm sideeffect "hlt #275", "{x0}"(i64 %[[A]])
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; CHECK: call void asm sideeffect "brk #2323", "{x0}"(i64 %[[A]])
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; CHECK: cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
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; CHECK: ret void
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@ -18,9 +18,9 @@ define i8 @test_load8(i8* %a) sanitize_hwaddress {
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #256", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2304", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #288", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2336", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #257", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2305", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #289", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2337", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: %[[G:[^ ]*]] = load i16, i16* %a, align 4
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #258", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2306", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #290", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2338", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: %[[G:[^ ]*]] = load i32, i32* %a, align 4
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #259", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2307", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #291", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2339", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: %[[G:[^ ]*]] = load i64, i64* %a, align 8
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #260", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2308", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #292", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2340", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: %[[G:[^ ]*]] = load i128, i128* %a, align 16
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@ -156,9 +156,9 @@ define void @test_store8(i8* %a, i8 %b) sanitize_hwaddress {
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #272", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2320", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #304", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2352", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: store i8 %b, i8* %a, align 4
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@ -181,9 +181,9 @@ define void @test_store16(i16* %a, i16 %b) sanitize_hwaddress {
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #273", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2321", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #305", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2353", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: store i16 %b, i16* %a, align 4
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #274", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2322", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #306", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2354", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: store i32 %b, i32* %a, align 4
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@ -231,9 +231,9 @@ define void @test_store64(i64* %a, i64 %b) sanitize_hwaddress {
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #275", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2323", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #307", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2355", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: store i64 %b, i64* %a, align 8
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@ -256,9 +256,9 @@ define void @test_store128(i128* %a, i128 %b) sanitize_hwaddress {
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; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
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; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
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; ABORT: call void asm sideeffect "hlt #276", "{x0}"(i64 %[[A]])
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; ABORT: call void asm sideeffect "brk #2324", "{x0}"(i64 %[[A]])
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; ABORT: unreachable
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; RECOVER: call void asm sideeffect "hlt #308", "{x0}"(i64 %[[A]])
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; RECOVER: call void asm sideeffect "brk #2356", "{x0}"(i64 %[[A]])
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; RECOVER: br label
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; CHECK: store i128 %b, i128* %a, align 16
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@ -1,4 +1,4 @@
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; Test basic address sanitizer instrumentation.
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; Test kernel hwasan instrumentation for alloca.
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;
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; RUN: opt < %s -hwasan -hwasan-kernel=1 -S | FileCheck %s
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@ -1,27 +1,42 @@
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; Test kernel hwasan instrumentation.
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;
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; RUN: opt < %s -hwasan -hwasan-kernel=1 -S | FileCheck %s --allow-empty --check-prefixes=KERNEL
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; RUN: opt < %s -hwasan -hwasan-mapping-offset=12345678 -S | FileCheck %s --check-prefixes=OFFSET
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; RUN: opt < %s -hwasan -hwasan-kernel=1 -S | FileCheck %s --allow-empty --check-prefixes=INIT
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; RUN: opt < %s -hwasan -hwasan-kernel=1 -S | FileCheck %s --check-prefixes=CHECK,NOOFFSET
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; RUN: opt < %s -hwasan -hwasan-kernel=1 -hwasan-mapping-offset=12345678 -S | FileCheck %s --check-prefixes=CHECK,OFFSET
|
||||
; RUN: opt < %s -hwasan -hwasan-kernel=1 -hwasan-recover=0 -S | FileCheck %s --check-prefixes=CHECK,NOOFFSET,ABORT
|
||||
; RUN: opt < %s -hwasan -hwasan-kernel=1 -hwasan-recover=1 -S | FileCheck %s --check-prefixes=CHECK,NOOFFSET,RECOVER
|
||||
|
||||
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64--linux-android"
|
||||
|
||||
define i8 @test_load(i8* %a) sanitize_hwaddress {
|
||||
; OFFSET-LABEL: @test_load(
|
||||
; OFFSET: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
|
||||
; OFFSET: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
|
||||
; OFFSET: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
|
||||
; OFFSET: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
|
||||
; OFFSET: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
|
||||
; CHECK-LABEL: @test_load(
|
||||
; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
|
||||
; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
|
||||
; CHECK: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
|
||||
; CHECK: %[[C:[^ ]*]] = or i64 %[[A]], -72057594037927936
|
||||
; CHECK: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
|
||||
|
||||
; NOOFFSET: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
|
||||
|
||||
; OFFSET: %[[D1:[^ ]*]] = add i64 %[[D]], 12345678
|
||||
; OFFSET: %[[E:[^ ]*]] = inttoptr i64 %[[D1]] to i8*
|
||||
; OFFSET: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
|
||||
; OFFSET: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
|
||||
; OFFSET: br i1 %[[F]],
|
||||
|
||||
; CHECK: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
|
||||
; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
|
||||
; CHECK: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
|
||||
|
||||
; ABORT: call void asm sideeffect "brk #2304", "{x0}"(i64 %[[A]])
|
||||
; ABORT: unreachable
|
||||
; RECOVER: call void asm sideeffect "brk #2336", "{x0}"(i64 %[[A]])
|
||||
; RECOVER: br label
|
||||
|
||||
; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
|
||||
; CHECK: ret i8 %[[G]]
|
||||
|
||||
entry:
|
||||
%b = load i8, i8* %a, align 4
|
||||
ret i8 %b
|
||||
}
|
||||
|
||||
; KERNEL-NOT: call void @__hwasan_init
|
||||
; INIT-NOT: call void @__hwasan_init
|
||||
|
|
Loading…
Reference in New Issue