maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[mlir][ODS] Use c++ types for integer attributes of fixed width when possible. 

Unsigned and Signless attributes use uintN_t and signed attributes use intN_t, where N is the fixed width. The 1-bit variants use bool.

Differential Revision: https://reviews.llvm.org/D86739
This commit is contained in:
River Riddle 2020-09-01 13:32:14 -07:00
parent 137dfd616a
commit 431bb8b318
23 changed files with 109 additions and 124 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
mlir/examples/toy/Ch7/mlir/Dialect.cpp
View File

@ -365,7 +365,7 @@ void StructAccessOp::build(mlir::OpBuilder &b, mlir::OperationState &state,
static mlir::LogicalResult verify(StructAccessOp op) {
StructType structTy = op.input().getType().cast<StructType>();
size_t index = op.index().getZExtValue();
size_t index = op.index();
if (index >= structTy.getNumElementTypes())
return op.emitOpError()
<< "index should be within the range of the input struct type";

2
mlir/examples/toy/Ch7/mlir/ToyCombine.cpp
View File

@ -42,7 +42,7 @@ OpFoldResult StructAccessOp::fold(ArrayRef<Attribute> operands) {
if (!structAttr)
return nullptr;
size_t elementIndex = index().getZExtValue();
size_t elementIndex = index();
return structAttr[elementIndex];
}

41
mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
View File

@ -215,17 +215,9 @@ def LLVM_FNegOp : LLVM_UnaryArithmeticOp<"fneg", "CreateFNeg">;
// Common code definition that is used to verify and set the alignment attribute
// of LLVM ops that accept such an attribute.
class MemoryOpWithAlignmentBase {
code alignmentVerifierCode = [{
if (alignment().hasValue()) {
auto align = alignment().getValue().getSExtValue();
if (align < 0)
return emitOpError("expected positive alignment");
}
return success();
}];
code setAlignmentCode = [{
if ($alignment.hasValue()) {
auto align = $alignment.getValue().getZExtValue();
auto align = $alignment.getValue();
if (align != 0)
inst->setAlignment(llvm::Align(align));
}
@ -266,7 +258,6 @@ def LLVM_AllocaOp :
}]>];
let parser = [{ return parseAllocaOp(parser, result); }];
let printer = [{ printAllocaOp(p, *this); }];
let verifier = alignmentVerifierCode;
}
def LLVM_GEPOp : LLVM_OneResultOp<"getelementptr", [NoSideEffect]>,
Arguments<(ins LLVM_Type:$base, Variadic<LLVM_Type>:$indices)>,
@ -301,7 +292,6 @@ def LLVM_LoadOp :
"bool isNonTemporal = false">];
let parser = [{ return parseLoadOp(parser, result); }];
let printer = [{ printLoadOp(p, *this); }];
let verifier = alignmentVerifierCode;
}
def LLVM_StoreOp :
MemoryOpWithAlignmentAndAttributes,
@ -321,7 +311,6 @@ def LLVM_StoreOp :
];
let parser = [{ return parseStoreOp(parser, result); }];
let printer = [{ printStoreOp(p, *this); }];
let verifier = alignmentVerifierCode;
}
// Casts.
@ -646,7 +635,7 @@ def LLVM_AddressOfOp
OpBuilder<"OpBuilder &builder, OperationState &result, GlobalOp global, "
"ArrayRef<NamedAttribute> attrs = {}", [{
build(builder, result,
global.getType().getPointerTo(global.addr_space().getZExtValue()),
global.getType().getPointerTo(global.addr_space()),
global.sym_name(), attrs);}]>,
OpBuilder<"OpBuilder &builder, OperationState &result, LLVMFuncOp func, "
@ -917,8 +906,8 @@ def LLVM_MatrixColumnMajorLoadOp
llvm::Align align = dl.getABITypeAlign(
$data->getType()->getPointerElementType());
$res = mb.CreateColumnMajorLoad(
$data, align, $stride, $isVolatile.getZExtValue(), $rows.getZExtValue(),
$columns.getZExtValue());
$data, align, $stride, $isVolatile, $rows,
$columns);
}];
let assemblyFormat = "$data `,` `<` `stride` `=` $stride `>` attr-dict"
"`:` type($res) `from` type($data) `stride` type($stride)";
@ -943,8 +932,8 @@ def LLVM_MatrixColumnMajorStoreOp
llvm::Align align = dl.getABITypeAlign(
$data->getType()->getPointerElementType());
mb.CreateColumnMajorStore(
$matrix, $data, align, $stride, $isVolatile.getZExtValue(),
$rows.getZExtValue(), $columns.getZExtValue());
$matrix, $data, align, $stride, $isVolatile,
$rows, $columns);
}];
let assemblyFormat = "$matrix `,` $data `,` `<` `stride` `=` $stride `>` "
"attr-dict`:` type($matrix) `to` type($data) `stride` type($stride)";
@ -960,8 +949,8 @@ def LLVM_MatrixMultiplyOp
string llvmBuilder = [{
llvm::MatrixBuilder<decltype(builder)> mb(builder);
$res = mb.CreateMatrixMultiply(
$lhs, $rhs, $lhs_rows.getZExtValue(), $lhs_columns.getZExtValue(),
$rhs_columns.getZExtValue());
$lhs, $rhs, $lhs_rows, $lhs_columns,
$rhs_columns);
}];
let assemblyFormat = "$lhs `,` $rhs attr-dict "
"`:` `(` type($lhs) `,` type($rhs) `)` `->` type($res)";
@ -975,7 +964,7 @@ def LLVM_MatrixTransposeOp
string llvmBuilder = [{
llvm::MatrixBuilder<decltype(builder)> mb(builder);
$res = mb.CreateMatrixTranspose(
$matrix, $rows.getZExtValue(), $columns.getZExtValue());
$matrix, $rows, $columns);
}];
let assemblyFormat = "$matrix attr-dict `:` type($matrix) `into` type($res)";
}
@ -999,9 +988,9 @@ def LLVM_MaskedLoadOp
Variadic<LLVM_Type>:$pass_thru, I32Attr:$alignment)> {
string llvmBuilder = [{
$res = $pass_thru.empty() ? builder.CreateMaskedLoad(
$data, llvm::Align($alignment.getZExtValue()), $mask) :
$data, llvm::Align($alignment), $mask) :
builder.CreateMaskedLoad(
$data, llvm::Align($alignment.getZExtValue()), $mask, $pass_thru[0]);
$data, llvm::Align($alignment), $mask, $pass_thru[0]);
}];
let assemblyFormat =
"operands attr-dict `:` functional-type(operands, results)";
@ -1014,7 +1003,7 @@ def LLVM_MaskedStoreOp
I32Attr:$alignment)> {
string llvmBuilder = [{
builder.CreateMaskedStore(
$value, $data, llvm::Align($alignment.getZExtValue()), $mask);
$value, $data, llvm::Align($alignment), $mask);
}];
let assemblyFormat = "$value `,` $data `,` $mask attr-dict `:` "
"type($value) `,` type($mask) `into` type($data)";
@ -1027,9 +1016,9 @@ def LLVM_masked_gather
Variadic<LLVM_Type>:$pass_thru, I32Attr:$alignment)> {
string llvmBuilder = [{
$res = $pass_thru.empty() ? builder.CreateMaskedGather(
$ptrs, llvm::Align($alignment.getZExtValue()), $mask) :
$ptrs, llvm::Align($alignment), $mask) :
builder.CreateMaskedGather(
$ptrs, llvm::Align($alignment.getZExtValue()), $mask, $pass_thru[0]);
$ptrs, llvm::Align($alignment), $mask, $pass_thru[0]);
}];
let assemblyFormat =
"operands attr-dict `:` functional-type(operands, results)";
@ -1042,7 +1031,7 @@ def LLVM_masked_scatter
I32Attr:$alignment)> {
string llvmBuilder = [{
builder.CreateMaskedScatter(
$value, $ptrs, llvm::Align($alignment.getZExtValue()), $mask);
$value, $ptrs, llvm::Align($alignment), $mask);
}];
let assemblyFormat = "$value `,` $ptrs `,` $mask attr-dict `:` "
"type($value) `,` type($mask) `into` type($ptrs)";

6
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
View File

@ -477,9 +477,9 @@ class GenericOpBase<string mnemonic> : LinalgStructuredBase_Op<mnemonic,
};
}
unsigned getNumInputs() { return args_in().getSExtValue(); }
unsigned getNumInputs() { return args_in(); }
unsigned getNumOutputs() { return args_out().getSExtValue(); }
unsigned getNumOutputs() { return args_out(); }
StringRef getLibraryCallName() {
return library_call().hasValue() ? library_call().getValue() : "";
@ -498,7 +498,7 @@ class GenericOpBase<string mnemonic> : LinalgStructuredBase_Op<mnemonic,
llvm::Optional<unsigned> getSymbolSource() {
auto ss = symbol_source();
return ss.hasValue() ?
llvm::Optional<unsigned>(ss.getValue().getLimitedValue()) : llvm::None;
llvm::Optional<unsigned>(ss.getValue()) : llvm::None;
}
}];

2
mlir/include/mlir/Dialect/Quant/QuantOps.td
View File

@ -248,7 +248,7 @@ def quant_StatisticsOp : quant_Op<"stats", [SameOperandsAndResultType]> {
auto shape = tensorArg.getShape();
auto argSliceSize = std::accumulate(std::next(shape.begin(),
axis()->getSExtValue()), shape.end(), 1, std::multiplies<int64_t>());
*axis()), shape.end(), 1, std::multiplies<int64_t>());
auto axisStatsType = axisStats()->getType();
if (!axisStatsType.getElementType().isa<FloatType>()) {

14
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
View File

@ -2045,20 +2045,6 @@ def PrefetchOp : Std_Op<"prefetch"> {
IntMaxValue<3>]>:$localityHint,
BoolAttr:$isDataCache);
let builders = [OpBuilder<
"OpBuilder &builder, OperationState &result, Value memref,"
"ArrayRef<Value> indices, bool isWrite, unsigned hint, bool isData",
[{
auto hintAttr = builder.getI32IntegerAttr(hint);
auto isWriteAttr = builder.getBoolAttr(isWrite);
auto isDataCacheAttr = builder.getBoolAttr(isData);
result.addOperands(memref);
result.addOperands(indices);
result.addAttribute("localityHint", hintAttr);
result.addAttribute("isWrite", isWriteAttr);
result.addAttribute("isDataCache", isDataCacheAttr);
}]>];
let extraClassDeclaration = [{
MemRefType getMemRefType() {
return memref().getType().cast<MemRefType>();

78
mlir/include/mlir/IR/OpBase.td
View File

@ -904,12 +904,24 @@ class SignlessIntegerAttrBase<I attrValType, string descr> :
descr> {
let returnType = [{ ::llvm::APInt }];
}
// Base class for signless integer attributes of fixed width that have a
// correpsonding C++ type.
class TypedSignlessIntegerAttrBase<I attrValType, string retType, string descr>
: SignlessIntegerAttrBase<attrValType, descr> {
let returnType = retType;
let convertFromStorage = "$_self.getValue().getZExtValue()";
}
def I1Attr : SignlessIntegerAttrBase<I1, "1-bit signless integer attribute">;
def I8Attr : SignlessIntegerAttrBase<I8, "8-bit signless integer attribute">;
def I16Attr : SignlessIntegerAttrBase<I16, "16-bit signless integer attribute">;
def I32Attr : SignlessIntegerAttrBase<I32, "32-bit signless integer attribute">;
def I64Attr : SignlessIntegerAttrBase<I64, "64-bit signless integer attribute">;
def I1Attr : TypedSignlessIntegerAttrBase<
I1, "bool", "1-bit signless integer attribute">;
def I8Attr : TypedSignlessIntegerAttrBase<
I8, "uint8_t", "8-bit signless integer attribute">;
def I16Attr : TypedSignlessIntegerAttrBase<
I16, "uint16_t", "16-bit signless integer attribute">;
def I32Attr : TypedSignlessIntegerAttrBase<
I32, "uint32_t", "32-bit signless integer attribute">;
def I64Attr : TypedSignlessIntegerAttrBase<
I64, "uint64_t", "64-bit signless integer attribute">;
// Base class for signed integer attributes of fixed width.
class SignedIntegerAttrBase<SI attrValType, string descr> :
@ -921,17 +933,24 @@ class SignedIntegerAttrBase<SI attrValType, string descr> :
descr> {
let returnType = [{ ::llvm::APInt }];
}
// Base class for signed integer attributes of fixed width that have a
// correpsonding C++ type.
class TypedSignedIntegerAttrBase<SI attrValType, string retType, string descr>
: SignedIntegerAttrBase<attrValType, descr> {
let returnType = retType;
let convertFromStorage = "$_self.getValue().getSExtValue()";
}
def SI1Attr : SignedIntegerAttrBase<
SI1, "1-bit signed integer attribute">;
def SI8Attr : SignedIntegerAttrBase<
SI8, "8-bit signed integer attribute">;
def SI16Attr : SignedIntegerAttrBase<
SI16, "16-bit signed integer attribute">;
def SI32Attr : SignedIntegerAttrBase<
SI32, "32-bit signed integer attribute">;
def SI64Attr : SignedIntegerAttrBase<
SI64, "64-bit signed integer attribute">;
def SI1Attr : TypedSignedIntegerAttrBase<
SI1, "bool", "1-bit signed integer attribute">;
def SI8Attr : TypedSignedIntegerAttrBase<
SI8, "int8_t", "8-bit signed integer attribute">;
def SI16Attr : TypedSignedIntegerAttrBase<
SI16, "int16_t", "16-bit signed integer attribute">;
def SI32Attr : TypedSignedIntegerAttrBase<
SI32, "int32_t", "32-bit signed integer attribute">;
def SI64Attr : TypedSignedIntegerAttrBase<
SI64, "int64_t", "64-bit signed integer attribute">;
// Base class for unsigned integer attributes of fixed width.
class UnsignedIntegerAttrBase<UI attrValType, string descr> :
@ -943,17 +962,24 @@ class UnsignedIntegerAttrBase<UI attrValType, string descr> :
descr> {
let returnType = [{ ::llvm::APInt }];
}
// Base class for unsigned integer attributes of fixed width that have a
// correpsonding C++ type.
class TypedUnsignedIntegerAttrBase<UI attrValType, string retType, string descr>
: UnsignedIntegerAttrBase<attrValType, descr> {
let returnType = retType;
let convertFromStorage = "$_self.getValue().getZExtValue()";
}
def UI1Attr : UnsignedIntegerAttrBase<
UI1, "1-bit unsigned integer attribute">;
def UI8Attr : UnsignedIntegerAttrBase<
UI8, "8-bit unsigned integer attribute">;
def UI16Attr : UnsignedIntegerAttrBase<
UI16, "16-bit unsigned integer attribute">;
def UI32Attr : UnsignedIntegerAttrBase<
UI32, "32-bit unsigned integer attribute">;
def UI64Attr : UnsignedIntegerAttrBase<
UI64, "64-bit unsigned integer attribute">;
def UI1Attr : TypedUnsignedIntegerAttrBase<
UI1, "bool", "1-bit unsigned integer attribute">;
def UI8Attr : TypedUnsignedIntegerAttrBase<
UI8, "uint8_t", "8-bit unsigned integer attribute">;
def UI16Attr : TypedUnsignedIntegerAttrBase<
UI16, "uint16_t", "16-bit unsigned integer attribute">;
def UI32Attr : TypedUnsignedIntegerAttrBase<
UI32, "uint32_t", "32-bit unsigned integer attribute">;
def UI64Attr : TypedUnsignedIntegerAttrBase<
UI64, "uint64_t", "64-bit unsigned integer attribute">;
// Base class for float attributes of fixed width.
class FloatAttrBase<F attrValType, string descr> :
@ -1220,7 +1246,7 @@ class DictionaryAttrBase<Pred condition, string description> :
let convertFromStorage = "$_self";
}
def DictionaryAttr
def DictionaryAttr
: DictionaryAttrBase<CPred<"$_self.isa<::mlir::DictionaryAttr>()">,
"dictionary of named attribute values">;

6
mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
View File

@ -502,9 +502,9 @@ public:
return failure();
// Build std.prefetch memref[expandedMap.results].
rewriter.replaceOpWithNewOp<PrefetchOp>(
op, op.memref(), *resultOperands, op.isWrite(),
op.localityHint().getZExtValue(), op.isDataCache());
rewriter.replaceOpWithNewOp<PrefetchOp>(op, op.memref(), *resultOperands,
op.isWrite(), op.localityHint(),
op.isDataCache());
return success();
}
};

4
mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
View File

@ -100,8 +100,8 @@ struct GPUFuncOpLowering : ConvertToLLVMPattern {
Value address = rewriter.create<LLVM::AddressOfOp>(loc, global);
auto elementType = global.getType().getArrayElementType();
Value memory = rewriter.create<LLVM::GEPOp>(
loc, elementType.getPointerTo(global.addr_space().getZExtValue()),
address, ArrayRef<Value>{zero, zero});
loc, elementType.getPointerTo(global.addr_space()), address,
ArrayRef<Value>{zero, zero});
// Build a memref descriptor pointing to the buffer to plug with the
// existing memref infrastructure. This may use more registers than

3
mlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp
View File

@ -71,8 +71,7 @@ SingleWorkgroupReduction::matchAsPerformingReduction(
return llvm::None;
// Make sure this is reduction with one input and one output.
if (genericOp.args_in().getZExtValue() != 1 ||
genericOp.args_out().getZExtValue() != 1)
if (genericOp.args_in() != 1 || genericOp.args_out() != 1)
return llvm::None;
auto originalInputType = op->getOperand(0).getType().cast<MemRefType>();

5
mlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
View File

@ -766,9 +766,8 @@ public:
case spirv::MemoryAccess::None:
case spirv::MemoryAccess::Nontemporal:
case spirv::MemoryAccess::Volatile: {
unsigned alignment = memoryAccess == spirv::MemoryAccess::Aligned
? op.alignment().getValue().getZExtValue()
: 0;
unsigned alignment =
memoryAccess == spirv::MemoryAccess::Aligned ? *op.alignment() : 0;
bool isNonTemporal = memoryAccess == spirv::MemoryAccess::Nontemporal;
bool isVolatile = memoryAccess == spirv::MemoryAccess::Volatile;
replaceWithLoadOrStore(op, rewriter, this->typeConverter, alignment,

1
mlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
View File

@ -70,7 +70,6 @@ public:
LogicalResult
matchAndRewrite(ConstSizeOp op, ArrayRef<Value> operands,
ConversionPatternRewriter &rewriter) const override {
rewriter.replaceOpWithNewOp<ConstantIndexOp>(op, op.value().getSExtValue());
return success();
}

16
mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
View File

@ -1804,8 +1804,8 @@ struct AllocLikeOpLowering : public ConvertOpToLLVMPattern<AllocLikeOp> {
if (!typeConverter.getOptions().useAlignedAlloc)
return None;
if (allocOp.alignment())
return allocOp.alignment().getValue().getSExtValue();
if (Optional<uint64_t> alignment = allocOp.alignment())
return *alignment;
// Whenever we don't have alignment set, we will use an alignment
// consistent with the element type; since the allocation size has to be a
@ -1843,8 +1843,7 @@ struct AllocLikeOpLowering : public ConvertOpToLLVMPattern<AllocLikeOp> {
accessAlignment = nullptr;
return rewriter.create<LLVM::AllocaOp>(
loc, elementPtrType, cumulativeSize,
allocaOp.alignment() ? allocaOp.alignment().getValue().getSExtValue()
: 0);
allocaOp.alignment() ? *allocaOp.alignment() : 0);
}
// Heap allocations.
@ -1892,9 +1891,8 @@ struct AllocLikeOpLowering : public ConvertOpToLLVMPattern<AllocLikeOp> {
callArgs = {alignedAllocAlignmentValue, cumulativeSize};
} else {
// Adjust the allocation size to consider alignment.
if (allocOp.alignment()) {
accessAlignment = createIndexConstant(
rewriter, loc, allocOp.alignment().getValue().getSExtValue());
if (Optional<uint64_t> alignment = allocOp.alignment()) {
accessAlignment = createIndexConstant(rewriter, loc, *alignment);
cumulativeSize = rewriter.create<LLVM::SubOp>(
loc,
rewriter.create<LLVM::AddOp>(loc, cumulativeSize, accessAlignment),
@ -2537,7 +2535,7 @@ struct PrefetchOpLowering : public LoadStoreOpLowering<PrefetchOp> {
rewriter.getI32IntegerAttr(prefetchOp.isWrite()));
auto localityHint = rewriter.create<LLVM::ConstantOp>(
op->getLoc(), llvmI32Type,
rewriter.getI32IntegerAttr(prefetchOp.localityHint().getZExtValue()));
rewriter.getI32IntegerAttr(prefetchOp.localityHint()));
auto isData = rewriter.create<LLVM::ConstantOp>(
op->getLoc(), llvmI32Type,
rewriter.getI32IntegerAttr(prefetchOp.isDataCache()));
@ -3063,7 +3061,7 @@ struct AssumeAlignmentOpLowering
ConversionPatternRewriter &rewriter) const override {
AssumeAlignmentOp::Adaptor transformed(operands);
Value memref = transformed.memref();
unsigned alignment = cast<AssumeAlignmentOp>(op).alignment().getZExtValue();
unsigned alignment = cast<AssumeAlignmentOp>(op).alignment();
MemRefDescriptor memRefDescriptor(memref);
Value ptr = memRefDescriptor.alignedPtr(rewriter, memref.getLoc());

5
mlir/lib/Dialect/Affine/IR/AffineOps.cpp
View File

@ -878,9 +878,8 @@ void SimplifyAffineOp<AffinePrefetchOp>::replaceAffineOp(
PatternRewriter &rewriter, AffinePrefetchOp prefetch, AffineMap map,
ArrayRef<Value> mapOperands) const {
rewriter.replaceOpWithNewOp<AffinePrefetchOp>(
prefetch, prefetch.memref(), map, mapOperands,
prefetch.localityHint().getZExtValue(), prefetch.isWrite(),
prefetch.isDataCache());
prefetch, prefetch.memref(), map, mapOperands, prefetch.localityHint(),
prefetch.isWrite(), prefetch.isDataCache());
}
template <>
void SimplifyAffineOp<AffineStoreOp>::replaceAffineOp(

7
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
View File

@ -124,7 +124,7 @@ static void printAllocaOp(OpAsmPrinter &p, AllocaOp &op) {
op.getContext());
p << op.getOperationName() << ' ' << op.arraySize() << " x " << elemTy;
if (op.alignment().hasValue() && op.alignment()->getSExtValue() != 0)
if (op.alignment().hasValue() && *op.alignment() != 0)
p.printOptionalAttrDict(op.getAttrs());
else
p.printOptionalAttrDict(op.getAttrs(), {"alignment"});
@ -914,9 +914,8 @@ static LogicalResult verify(AddressOfOp op) {
return op.emitOpError(
"must reference a global defined by 'llvm.mlir.global' or 'llvm.func'");
if (global &&
global.getType().getPointerTo(global.addr_space().getZExtValue()) !=
op.getResult().getType())
if (global && global.getType().getPointerTo(global.addr_space()) !=
op.getResult().getType())
return op.emitOpError(
"the type must be a pointer to the type of the referenced global");

11
mlir/lib/Dialect/Quant/Transforms/ConvertSimQuant.cpp
View File

@ -89,9 +89,9 @@ public:
QuantizedType convertFakeQuantAttrsToType(ConstFakeQuant fqOp,
Type expressedType) const {
return fakeQuantAttrsToType(
fqOp.getLoc(), fqOp.num_bits().getSExtValue(),
fqOp.min().convertToFloat(), fqOp.max().convertToFloat(),
fqOp.narrow_range(), expressedType, fqOp.is_signed());
fqOp.getLoc(), fqOp.num_bits(), fqOp.min().convertToFloat(),
fqOp.max().convertToFloat(), fqOp.narrow_range(), expressedType,
fqOp.is_signed());
}
};
@ -115,9 +115,8 @@ public:
for (auto m : fqOp.max())
max.push_back(m.cast<FloatAttr>().getValueAsDouble());
return fakeQuantAttrsToType(fqOp.getLoc(), fqOp.num_bits().getSExtValue(),
fqOp.axis().getSExtValue(), min, max,
fqOp.narrow_range(), expressedType,
return fakeQuantAttrsToType(fqOp.getLoc(), fqOp.num_bits(), fqOp.axis(),
min, max, fqOp.narrow_range(), expressedType,
fqOp.is_signed());
}
};

4
mlir/lib/Dialect/SPIRV/SPIRVOps.cpp
View File

@ -250,7 +250,7 @@ static void printMemoryAccessAttribute(
MemoryOpTy memoryOp, OpAsmPrinter &printer,
SmallVectorImpl<StringRef> &elidedAttrs,
Optional<spirv::MemoryAccess> memoryAccessAtrrValue = None,
Optional<llvm::APInt> alignmentAttrValue = None) {
Optional<uint32_t> alignmentAttrValue = None) {
// Print optional memory access attribute.
if (auto memAccess = (memoryAccessAtrrValue ? memoryAccessAtrrValue
: memoryOp.memory_access())) {
@ -280,7 +280,7 @@ static void printSourceMemoryAccessAttribute(
MemoryOpTy memoryOp, OpAsmPrinter &printer,
SmallVectorImpl<StringRef> &elidedAttrs,
Optional<spirv::MemoryAccess> memoryAccessAtrrValue = None,
Optional<llvm::APInt> alignmentAttrValue = None) {
Optional<uint32_t> alignmentAttrValue = None) {
printer << ", ";

2
mlir/lib/Dialect/StandardOps/IR/Ops.cpp
View File

@ -468,7 +468,7 @@ void AssertOp::getCanonicalizationPatterns(OwningRewritePatternList &patterns,
//===----------------------------------------------------------------------===//
static LogicalResult verify(AssumeAlignmentOp op) {
unsigned alignment = op.alignment().getZExtValue();
unsigned alignment = op.alignment();
if (!llvm::isPowerOf2_32(alignment))
return op.emitOpError("alignment must be power of 2");
return success();

2
mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
View File

@ -721,7 +721,7 @@ LogicalResult ModuleTranslation::convertGlobals() {
((linkage == llvm::GlobalVariable::ExternalLinkage &&
isa<llvm::UndefValue>(cst)) ||
linkage == llvm::GlobalVariable::ExternalWeakLinkage);
auto addrSpace = op.addr_space().getLimitedValue();
auto addrSpace = op.addr_space();
auto *var = new llvm::GlobalVariable(
*llvmModule, type, op.constant(), linkage,
anyExternalLinkage ? nullptr : cst, op.sym_name(),

7
mlir/test/Dialect/LLVMIR/invalid.mlir
View File

@ -62,13 +62,6 @@ func @alloca_non_function_type() {
// -----
func @alloca_nonpositive_alignment(%size : !llvm.i64) {
// expected-error@+1 {{expected positive alignment}}
llvm.alloca %size x !llvm.i32 {alignment = -1} : (!llvm.i64) -> (!llvm.ptr<i32>)
}
// -----
func @gep_missing_input_result_type(%pos : !llvm.i64, %base : !llvm.ptr<float>) {
// expected-error@+1 {{2 operands present, but expected 0}}
llvm.getelementptr %base[%pos] : () -> ()

3
mlir/test/lib/Dialect/Test/TestPatterns.cpp
View File

@ -457,8 +457,7 @@ struct TestBoundedRecursiveRewrite
PatternRewriter &rewriter) const final {
// Decrement the depth of the op in-place.
rewriter.updateRootInPlace(op, [&] {
op.setAttr("depth",
rewriter.getI64IntegerAttr(op.depth().getSExtValue() - 1));
op.setAttr("depth", rewriter.getI64IntegerAttr(op.depth() - 1));
});
return success();
}

8
mlir/test/mlir-tblgen/op-attribute.td
View File

@ -138,8 +138,8 @@ def BOp : NS_Op<"b_op", []> {
// DEF: ::mlir::Attribute BOp::any_attr()
// DEF: bool BOp::bool_attr()
// DEF: ::llvm::APInt BOp::i32_attr()
// DEF: ::llvm::APInt BOp::i64_attr()
// DEF: uint32_t BOp::i32_attr()
// DEF: uint64_t BOp::i64_attr()
// DEF: ::llvm::APFloat BOp::f32_attr()
// DEF: ::llvm::APFloat BOp::f64_attr()
// DEF: ::llvm::StringRef BOp::str_attr()
@ -196,7 +196,7 @@ def DOp : NS_Op<"d_op", []> {
}
// DECL-LABEL: DOp declarations
// DECL: static void build({{.*}}, ::llvm::APInt i32_attr, ::llvm::APFloat f64_attr, ::llvm::StringRef str_attr, bool bool_attr, ::SomeI32Enum enum_attr, ::llvm::APInt dv_i32_attr, ::llvm::APFloat dv_f64_attr, ::llvm::StringRef dv_str_attr = "abc", bool dv_bool_attr = true, ::SomeI32Enum dv_enum_attr = ::SomeI32Enum::case5)
// DECL: static void build({{.*}}, uint32_t i32_attr, ::llvm::APFloat f64_attr, ::llvm::StringRef str_attr, bool bool_attr, ::SomeI32Enum enum_attr, uint32_t dv_i32_attr, ::llvm::APFloat dv_f64_attr, ::llvm::StringRef dv_str_attr = "abc", bool dv_bool_attr = true, ::SomeI32Enum dv_enum_attr = ::SomeI32Enum::case5)
// DEF-LABEL: DOp definitions
// DEF: odsState.addAttribute("str_attr", odsBuilder.getStringAttr(str_attr));
@ -238,7 +238,7 @@ def EOp : NS_Op<"e_op", []> {
}
// DECL-LABEL: EOp declarations
// DECL: static void build({{.*}}, ::llvm::APInt i32_attr, ::llvm::APInt dv_i32_attr, ::llvm::APFloat f64_attr, ::llvm::APFloat dv_f64_attr, ::llvm::StringRef str_attr, ::llvm::StringRef dv_str_attr, bool bool_attr, bool dv_bool_attr, ::SomeI32Enum enum_attr, ::SomeI32Enum dv_enum_attr = ::SomeI32Enum::case5)
// DECL: static void build({{.*}}, uint32_t i32_attr, uint32_t dv_i32_attr, ::llvm::APFloat f64_attr, ::llvm::APFloat dv_f64_attr, ::llvm::StringRef str_attr, ::llvm::StringRef dv_str_attr, bool bool_attr, bool dv_bool_attr, ::SomeI32Enum enum_attr, ::SomeI32Enum dv_enum_attr = ::SomeI32Enum::case5)
// Test mixing operands and attributes in arbitrary order
// ---

4
mlir/test/mlir-tblgen/op-decl.td
View File

@ -77,12 +77,12 @@ def NS_AOp : NS_Op<"a_op", [IsolatedFromAbove, IsolatedFromAbove]> {
// CHECK: ::mlir::Region &someRegion();
// CHECK: ::mlir::MutableArrayRef<Region> someRegions();
// CHECK: ::mlir::IntegerAttr attr1Attr()
// CHECK: ::llvm::APInt attr1();
// CHECK: uint32_t attr1();
// CHECK: ::mlir::FloatAttr attr2Attr()
// CHECK: ::llvm::Optional< ::llvm::APFloat > attr2();
// CHECK: static void build(Value val);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::llvm::ArrayRef<::mlir::Type> s, ::mlir::Value a, ::mlir::ValueRange b, ::mlir::IntegerAttr attr1, /*optional*/::mlir::FloatAttr attr2, unsigned someRegionsCount)
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::llvm::ArrayRef<::mlir::Type> s, ::mlir::Value a, ::mlir::ValueRange b, ::llvm::APInt attr1, /*optional*/::mlir::FloatAttr attr2, unsigned someRegionsCount)
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::llvm::ArrayRef<::mlir::Type> s, ::mlir::Value a, ::mlir::ValueRange b, uint32_t attr1, /*optional*/::mlir::FloatAttr attr2, unsigned someRegionsCount)
// CHECK: static void build(::mlir::OpBuilder &, ::mlir::OperationState &odsState, ::llvm::ArrayRef<::mlir::Type> resultTypes, ::mlir::ValueRange operands, ::llvm::ArrayRef<::mlir::NamedAttribute> attributes, unsigned numRegions)
// CHECK: static ::mlir::ParseResult parse(::mlir::OpAsmParser &parser, ::mlir::OperationState &result);
// CHECK: void print(::mlir::OpAsmPrinter &p);