forked from OSchip/llvm-project
LiveIntervals: Split live intervals on multiple dead defs
This is a follow-up to D67448. Split live intervals with multiple dead defs during the initial execution of the live interval analysis, but do it outside of the function createAndComputeVirtRegInterval. Differential Revision: https://reviews.llvm.org/D68666
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@ -469,7 +469,7 @@ class VirtRegMap;
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void computeLiveInRegUnits();
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void computeRegUnitRange(LiveRange&, unsigned Unit);
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void computeVirtRegInterval(LiveInterval&);
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bool computeVirtRegInterval(LiveInterval&);
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using ShrinkToUsesWorkList = SmallVector<std::pair<SlotIndex, VNInfo*>, 16>;
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void extendSegmentsToUses(LiveRange &Segments,
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@ -191,12 +191,12 @@ LiveInterval* LiveIntervals::createInterval(unsigned reg) {
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}
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/// Compute the live interval of a virtual register, based on defs and uses.
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void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
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bool LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
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assert(LRCalc && "LRCalc not initialized.");
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assert(LI.empty() && "Should only compute empty intervals.");
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LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
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LRCalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg));
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computeDeadValues(LI, nullptr);
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return computeDeadValues(LI, nullptr);
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}
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void LiveIntervals::computeVirtRegs() {
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@ -204,7 +204,12 @@ void LiveIntervals::computeVirtRegs() {
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unsigned Reg = Register::index2VirtReg(i);
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if (MRI->reg_nodbg_empty(Reg))
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continue;
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createAndComputeVirtRegInterval(Reg);
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LiveInterval &LI = createEmptyInterval(Reg);
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bool NeedSplit = computeVirtRegInterval(LI);
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if (NeedSplit) {
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SmallVector<LiveInterval*, 8> SplitLIs;
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splitSeparateComponents(LI, SplitLIs);
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}
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}
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}
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@ -500,6 +505,8 @@ bool LiveIntervals::shrinkToUses(LiveInterval *li,
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bool LiveIntervals::computeDeadValues(LiveInterval &LI,
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SmallVectorImpl<MachineInstr*> *dead) {
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bool MayHaveSplitComponents = false;
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bool HaveDeadDef = false;
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for (VNInfo *VNI : LI.valnos) {
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if (VNI->isUnused())
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continue;
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@ -530,6 +537,10 @@ bool LiveIntervals::computeDeadValues(LiveInterval &LI,
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MachineInstr *MI = getInstructionFromIndex(Def);
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assert(MI && "No instruction defining live value");
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MI->addRegisterDead(LI.reg, TRI);
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if (HaveDeadDef)
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MayHaveSplitComponents = true;
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HaveDeadDef = true;
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if (dead && MI->allDefsAreDead()) {
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LLVM_DEBUG(dbgs() << "All defs dead: " << Def << '\t' << *MI);
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dead->push_back(MI);
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@ -1,10 +1,10 @@
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# RUN: llc < %s -run-pass=wasm-reg-stackify -x=mir 2>&1 | FileCheck %s
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# CHECK: body:
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# CHECK: %1:i32 = I32_WRAP_I64 %0,
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# CHECK-NEXT: DBG_VALUE %1,
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# CHECK-NEXT: %1:i32 = CALL_i32 @bar,
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# CHECK-NEXT: DBG_VALUE %1,
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# CHECK: dead %3:i32 = I32_WRAP_I64 %0,
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# CHECK-NEXT: DBG_VALUE %1:i32
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# CHECK-NEXT: dead %2:i32 = CALL_i32 @bar,
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# CHECK-NEXT: DBG_VALUE %1:i32,
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# CHECK-NEXT: %[[NEWREG:.*]]:i32 = CALL_i32 @bar,
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# CHECK-NEXT: DBG_VALUE %[[NEWREG]],
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# CHECK-NEXT: CALL_VOID @foo, %[[NEWREG]],
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@ -1,5 +1,4 @@
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# FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39481.
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# RUN: llc -mtriple=x86_64-linux-gnu -start-before greedy -stop-after virtregrewriter -o - -verify-machineinstrs=0 %s | FileCheck %s
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# RUN: llc -mtriple=x86_64-linux-gnu -start-before greedy -stop-after virtregrewriter -o - -verify-machineinstrs %s | FileCheck %s
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--- |
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; ModuleID = '<stdin>'
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@ -115,7 +114,7 @@ body: |
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# CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF
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# CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF
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# CHECK-NEXT: dead renamable $rcx = IMPLICIT_DEF
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# CHECK-NEXT: DBG_VALUE $rcx, $noreg, !18, !DIExpression()
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# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !18, !DIExpression()
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# CHECK-LABEL: bb.3:
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# CHECK: dead renamable $rcx = IMPLICIT_DEF
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