forked from OSchip/llvm-project
parent
345e08d24c
commit
430ab4f382
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@ -152,11 +152,24 @@ def FCONVFP32r64: Pseudo<(outs FP32:$dst), (ins GR64:$src),
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def FCONVFP64r32: Pseudo<(outs FP64:$dst), (ins GR32:$src),
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"cdfbr\t{$dst, $src}",
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[(set FP64:$dst, (sint_to_fp GR32:$src))]>;
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def FCONVFP64 : Pseudo<(outs FP64:$dst), (ins GR64:$src),
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"cdgbr\t{$dst, $src}",
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[(set FP64:$dst, (sint_to_fp GR64:$src))]>;
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def FCONVGR32 : Pseudo<(outs GR32:$dst), (ins FP32:$src),
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"cfebr\t{$dst, $src}",
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[(set GR32:$dst, (fp_to_sint FP32:$src))]>;
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def FCONVGR32r64: Pseudo<(outs GR32:$dst), (ins FP64:$src),
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"cgebr\t{$dst, $src}",
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[(set GR32:$dst, (fp_to_sint FP64:$src))]>;
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def FCONVGR64r32: Pseudo<(outs GR64:$dst), (ins FP32:$src),
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"cfdbr\t{$dst, $src}",
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[(set GR64:$dst, (fp_to_sint FP32:$src))]>;
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def FCONVGR64 : Pseudo<(outs GR64:$dst), (ins FP64:$src),
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"cgdbr\t{$dst, $src}",
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[(set GR64:$dst, (fp_to_sint FP64:$src))]>;
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//===----------------------------------------------------------------------===//
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// Test instructions (like AND but do not produce any result)
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