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[X86][MPX] Tag MPX instructions scheduler classes 

Currently tagged these as system instructions, once we have uses for them (ASAN?) and they are faster we will need to improve on this.

llvm-svn: 320173
This commit is contained in:
Simon Pilgrim 2017-12-08 19:03:42 +00:00
parent 2e25e896fb
commit 42fcda9a6c
2 changed files with 19 additions and 14 deletions
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32
llvm/lib/Target/X86/X86InstrMPX.td
View File

@ -13,13 +13,16 @@
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// FIXME: Investigate a better scheduler itinerary once MPX is used inside LLVM.
let SchedRW = [WriteSystem] in {
multiclass mpx_bound_make<bits<8> opc, string OpcodeStr> { multiclass mpx_bound_make<bits<8> opc, string OpcodeStr> {
let mayLoad = 1 in { let mayLoad = 1 in {
def 32rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i32mem:$src), def 32rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i32mem:$src),
OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, OpcodeStr#"\t{$src, $dst|$dst, $src}", [], IIC_MPX>,
Requires<[HasMPX, Not64BitMode]>; Requires<[HasMPX, Not64BitMode]>;
def 64rm: RI<opc, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), def 64rm: RI<opc, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src),
OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, OpcodeStr#"\t{$src, $dst|$dst, $src}", [], IIC_MPX>,
Requires<[HasMPX, In64BitMode]>; Requires<[HasMPX, In64BitMode]>;
} }
} }
@ -29,17 +32,17 @@ defm BNDMK : mpx_bound_make<0x1B, "bndmk">, XS;
multiclass mpx_bound_check<bits<8> opc, string OpcodeStr> { multiclass mpx_bound_check<bits<8> opc, string OpcodeStr> {
let mayLoad = 1 in { let mayLoad = 1 in {
def 32rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i32mem:$src2), def 32rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i32mem:$src2),
OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, OpcodeStr#"\t{$src2, $src1|$src1, $src2}", [], IIC_MPX>,
Requires<[HasMPX, Not64BitMode]>; Requires<[HasMPX, Not64BitMode]>;
def 64rm: RI<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i64mem:$src2), def 64rm: RI<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i64mem:$src2),
OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, OpcodeStr#"\t{$src2, $src1|$src1, $src2}", [], IIC_MPX>,
Requires<[HasMPX, In64BitMode]>; Requires<[HasMPX, In64BitMode]>;
} }
def 32rr: I<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR32:$src2), def 32rr: I<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR32:$src2),
OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, OpcodeStr#"\t{$src2, $src1|$src1, $src2}", [], IIC_MPX>,
Requires<[HasMPX, Not64BitMode]>; Requires<[HasMPX, Not64BitMode]>;
def 64rr: RI<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR64:$src2), def 64rr: RI<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR64:$src2),
OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, OpcodeStr#"\t{$src2, $src1|$src1, $src2}", [], IIC_MPX>,
Requires<[HasMPX, In64BitMode]>; Requires<[HasMPX, In64BitMode]>;
} }
defm BNDCL : mpx_bound_check<0x1A, "bndcl">, XS; defm BNDCL : mpx_bound_check<0x1A, "bndcl">, XS;
@ -47,32 +50,33 @@ defm BNDCU : mpx_bound_check<0x1A, "bndcu">, XD;
defm BNDCN : mpx_bound_check<0x1B, "bndcn">, XD; defm BNDCN : mpx_bound_check<0x1B, "bndcn">, XD;
def BNDMOVRMrr : I<0x1A, MRMSrcReg, (outs BNDR:$dst), (ins BNDR:$src), def BNDMOVRMrr : I<0x1A, MRMSrcReg, (outs BNDR:$dst), (ins BNDR:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX]>; Requires<[HasMPX]>;
let mayLoad = 1 in { let mayLoad = 1 in {
def BNDMOVRM32rm : I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), def BNDMOVRM32rm : I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX, Not64BitMode]>; Requires<[HasMPX, Not64BitMode]>;
def BNDMOVRM64rm : RI<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i128mem:$src), def BNDMOVRM64rm : RI<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i128mem:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX, In64BitMode]>; Requires<[HasMPX, In64BitMode]>;
} }
def BNDMOVMRrr : I<0x1B, MRMDestReg, (outs BNDR:$dst), (ins BNDR:$src), def BNDMOVMRrr : I<0x1B, MRMDestReg, (outs BNDR:$dst), (ins BNDR:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX]>; Requires<[HasMPX]>;
let mayStore = 1 in { let mayStore = 1 in {
def BNDMOVMR32mr : I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src), def BNDMOVMR32mr : I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX, Not64BitMode]>; Requires<[HasMPX, Not64BitMode]>;
def BNDMOVMR64mr : RI<0x1B, MRMDestMem, (outs), (ins i128mem:$dst, BNDR:$src), def BNDMOVMR64mr : RI<0x1B, MRMDestMem, (outs), (ins i128mem:$dst, BNDR:$src),
"bndmov\t{$src, $dst|$dst, $src}", []>, PD, "bndmov\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PD,
Requires<[HasMPX, In64BitMode]>; Requires<[HasMPX, In64BitMode]>;
def BNDSTXmr: I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src), def BNDSTXmr: I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src),
"bndstx\t{$src, $dst|$dst, $src}", []>, PS, "bndstx\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PS,
Requires<[HasMPX]>; Requires<[HasMPX]>;
} }
let mayLoad = 1 in let mayLoad = 1 in
def BNDLDXrm: I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), def BNDLDXrm: I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src),
"bndldx\t{$src, $dst|$dst, $src}", []>, PS, "bndldx\t{$src, $dst|$dst, $src}", [], IIC_MPX>, PS,
Requires<[HasMPX]>; Requires<[HasMPX]>;
} // SchedRW

1
llvm/lib/Target/X86/X86Schedule.td
View File

@ -499,6 +499,7 @@ def IIC_IRET : InstrItinClass;
def IIC_HLT : InstrItinClass; def IIC_HLT : InstrItinClass;
def IIC_LXS : InstrItinClass; def IIC_LXS : InstrItinClass;
def IIC_LTR : InstrItinClass; def IIC_LTR : InstrItinClass;
def IIC_MPX : InstrItinClass;
def IIC_PKU : InstrItinClass; def IIC_PKU : InstrItinClass;
def IIC_PTWRITE : InstrItinClass; def IIC_PTWRITE : InstrItinClass;
def IIC_RDPID : InstrItinClass; def IIC_RDPID : InstrItinClass;