forked from OSchip/llvm-project
Remove getTypeToExpandTo, since it isn't adding much value
beyond just calling getTypeToTransformTo. llvm-svn: 99335
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@ -268,27 +268,6 @@ public:
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return MVT(MVT::Other); // Not reached
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}
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/// getTypeToExpandTo - For types supported by the target, this is an
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/// identity function. For types that must be expanded (i.e. integer types
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/// that are larger than the largest integer register or illegal floating
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/// point types), this returns the largest legal type it will be expanded to.
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EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const {
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assert(!VT.isVector());
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while (true) {
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switch (getTypeAction(Context, VT)) {
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case Legal:
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return VT;
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case Expand:
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VT = getTypeToTransformTo(Context, VT);
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break;
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default:
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assert(false && "Type is not legal nor is it to be expanded!");
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return VT;
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}
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}
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return VT;
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}
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/// getVectorTypeBreakdown - Vector types are broken down into some number of
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/// legal first class types. For example, EVT::v8f32 maps to 2 EVT::v4f32
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/// with Altivec or SSE1, or 8 promoted EVT::f64 values with the X86 FP stack.
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@ -1021,7 +1021,7 @@ void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
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Hi = InL;
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} else if (Amt == 1 &&
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TLI.isOperationLegalOrCustom(ISD::ADDC,
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TLI.getTypeToExpandTo(*DAG.getContext(), NVT))) {
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TLI.getTypeToTransformTo(*DAG.getContext(), NVT))) {
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// Emit this X << 1 as X+X.
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SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
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SDValue LoOps[2] = { InL, InL };
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@ -1263,7 +1263,8 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N,
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bool hasCarry =
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TLI.isOperationLegalOrCustom(N->getOpcode() == ISD::ADD ?
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ISD::ADDC : ISD::SUBC,
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TLI.getTypeToExpandTo(*DAG.getContext(), NVT));
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TLI.getTypeToTransformTo(*DAG.getContext(),
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NVT));
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if (hasCarry) {
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SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
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