forked from OSchip/llvm-project
[ARM] Extra BFI codegen tests. NFC
This commit is contained in:
David Green
parent
71d5b0a757
commit
42d7d52314
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@ -216,3 +216,228 @@ define i32 @f13(i32 %x, i32 %y) {
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%sel = select i1 %cmp, i32 %y2, i32 %or
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ret i32 %sel
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}
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define i32 @bfi1(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi1:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: and r2, r0, #1
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; CHECK-NEXT: bic r1, r1, #19
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r2, r0, #16
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r0, r0, #2
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; CHECK-NEXT: orr r0, r1, r0
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; CHECK-NEXT: bx lr
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 16
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%y2 = and i32 %z1, 4294967279
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 2
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%y3 = and i32 %z2, 4294967293
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%z3 = or i32 %y3, %x3
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ret i32 %z3
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}
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define void @bfi1_use(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi1_use:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: mov r2, r1
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; CHECK-NEXT: lsr r3, r0, #4
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; CHECK-NEXT: bfi r2, r0, #0, #1
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; CHECK-NEXT: lsr r0, r0, #1
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; CHECK-NEXT: mov r1, r2
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; CHECK-NEXT: bfi r1, r3, #4, #1
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: bfi r3, r0, #1, #1
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; CHECK-NEXT: mov r0, r2
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; CHECK-NEXT: mov r2, r3
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; CHECK-NEXT: bl use
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; CHECK-NEXT: pop {r11, pc}
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 16
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%y2 = and i32 %z1, 4294967279
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 2
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%y3 = and i32 %z2, 4294967293
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%z3 = or i32 %y3, %x3
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call void @use(i32 %z1, i32 %z2, i32 %z3, i32 %z3)
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ret void
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}
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define i32 @bfi2(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movw r2, #65148
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; CHECK-NEXT: movt r2, #65535
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; CHECK-NEXT: and r1, r1, r2
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; CHECK-NEXT: and r2, r0, #1
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r2, r0, #2
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r2, r0, #128
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r0, r0, #256
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; CHECK-NEXT: orr r0, r1, r0
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; CHECK-NEXT: bx lr
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 2
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%y2 = and i32 %z1, 4294967293
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 128
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%y3 = and i32 %z2, 4294967167
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%z3 = or i32 %y3, %x3
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%x4 = and i32 %a, 256
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%y4 = and i32 %z3, 4294967039
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%z4 = or i32 %y4, %x4
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ret i32 %z4
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}
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define void @bfi2_uses(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi2_uses:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: mov r12, r1
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; CHECK-NEXT: bfi r1, r0, #0, #2
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; CHECK-NEXT: bfi r12, r0, #0, #1
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; CHECK-NEXT: lsr r0, r0, #7
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; CHECK-NEXT: mov r2, r1
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: bfi r2, r0, #7, #1
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; CHECK-NEXT: bfi r3, r0, #7, #2
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; CHECK-NEXT: mov r0, r12
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; CHECK-NEXT: bl use
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; CHECK-NEXT: pop {r11, pc}
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 2
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%y2 = and i32 %z1, 4294967293
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 128
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%y3 = and i32 %z2, 4294967167
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%z3 = or i32 %y3, %x3
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%x4 = and i32 %a, 256
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%y4 = and i32 %z3, 4294967039
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%z4 = or i32 %y4, %x4
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call void @use(i32 %z1, i32 %z2, i32 %z3, i32 %z4)
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ret void
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}
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define i32 @bfi3(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi3:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movw r2, #65148
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; CHECK-NEXT: movt r2, #65535
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; CHECK-NEXT: and r1, r1, r2
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; CHECK-NEXT: and r2, r0, #1
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r2, r0, #128
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r2, r0, #2
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; CHECK-NEXT: orr r1, r1, r2
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; CHECK-NEXT: and r0, r0, #256
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; CHECK-NEXT: orr r0, r1, r0
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; CHECK-NEXT: bx lr
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 128
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%y2 = and i32 %z1, 4294967167
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 2
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%y3 = and i32 %z2, 4294967293
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%z3 = or i32 %y3, %x3
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%x4 = and i32 %a, 256
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%y4 = and i32 %z3, 4294967039
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%z4 = or i32 %y4, %x4
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ret i32 %z4
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}
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define void @bfi3_uses(i32 %a, i32 %b) {
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; CHECK-LABEL: bfi3_uses:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: mov r12, r1
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; CHECK-NEXT: lsr r2, r0, #7
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; CHECK-NEXT: bfi r12, r0, #0, #1
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; CHECK-NEXT: lsr r3, r0, #1
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; CHECK-NEXT: lsr r0, r0, #8
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; CHECK-NEXT: mov r1, r12
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; CHECK-NEXT: bfi r1, r2, #7, #1
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; CHECK-NEXT: mov r2, r1
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; CHECK-NEXT: bfi r2, r3, #1, #1
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; CHECK-NEXT: mov r3, r2
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; CHECK-NEXT: bfi r3, r0, #8, #1
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; CHECK-NEXT: mov r0, r12
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; CHECK-NEXT: bl use
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; CHECK-NEXT: pop {r11, pc}
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%x1 = and i32 %a, 1
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%y1 = and i32 %b, 4294967294
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%z1 = or i32 %y1, %x1
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%x2 = and i32 %a, 128
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%y2 = and i32 %z1, 4294967167
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%z2 = or i32 %y2, %x2
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%x3 = and i32 %a, 2
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%y3 = and i32 %z2, 4294967293
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%z3 = or i32 %y3, %x3
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%x4 = and i32 %a, 256
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%y4 = and i32 %z3, 4294967039
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%z4 = or i32 %y4, %x4
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call void @use(i32 %z1, i32 %z2, i32 %z3, i32 %z4)
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ret void
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}
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define i32 @bfi4(i32 %A, i2 zeroext %BB, i32* %d) {
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; CHECK-LABEL: bfi4:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: lsr r3, r0, #1
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; CHECK-NEXT: mov r12, #96
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; CHECK-NEXT: bfi r1, r3, #2, #1
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; CHECK-NEXT: tst r0, #32
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; CHECK-NEXT: movweq r12, #32
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; CHECK-NEXT: bfi r1, r3, #9, #1
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; CHECK-NEXT: lsr r3, r0, #2
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; CHECK-NEXT: bfi r1, r3, #3, #1
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; CHECK-NEXT: bfi r1, r3, #10, #1
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; CHECK-NEXT: and r3, r0, #8
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; CHECK-NEXT: orr r1, r1, r3, lsl #8
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; CHECK-NEXT: and r3, r0, #64
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; CHECK-NEXT: and r0, r0, #128
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; CHECK-NEXT: orr r1, r1, r12
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; CHECK-NEXT: orr r1, r1, r3, lsl #1
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; CHECK-NEXT: str r1, [r2]
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; CHECK-NEXT: bx lr
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entry:
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%B = zext i2 %BB to i32
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%and = and i32 %A, 2
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%tobool12.not = icmp eq i32 %and, 0
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%or17 = or i32 %B, 516
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%spec.select112 = select i1 %tobool12.not, i32 %B, i32 %or17
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%and20 = and i32 %A, 4
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%tobool21.not = icmp eq i32 %and20, 0
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%or26 = or i32 %spec.select112, 1032
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%spec.select114 = select i1 %tobool21.not, i32 %spec.select112, i32 %or26
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store i32 %spec.select114, i32* %d, align 4
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%and29 = shl i32 %A, 8
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%l2 = and i32 %and29, 2048
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%l3 = or i32 %l2, %spec.select114
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%and38 = and i32 %A, 32
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%tobool39.not = icmp eq i32 %and38, 0
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%spec.select.v = select i1 %tobool39.not, i32 32, i32 96
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%spec.select = or i32 %l3, %spec.select.v
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%and45 = shl i32 %A, 1
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%l4 = and i32 %and45, 128
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%l5 = or i32 %l4, %spec.select
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store i32 %l5, i32* %d, align 4
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%and52 = and i32 %A, 128
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ret i32 %and52
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}
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declare void @use(i32, i32, i32, i32)
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