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[AArch64] Remove overlapping scheduling definitions (NFC) 

The scheduling definitions for ASIMD transpose and zipping overlapped with
others a few lines below.  Somehow, they didn't raise errors before.

There seem to be other overlapping definitions.  Somehow, they still don't
raise errors.

Differential revision: https://reviews.llvm.org/D68353
This commit is contained in:
Evandro Menezes 2019-10-24 11:37:01 -05:00
parent 23df0c783c
commit 42c8fae9d1
1 changed files with 0 additions and 19 deletions
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19
llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td
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@ -1517,25 +1517,6 @@ def : InstRW<[THX2T99Write_5Cyc_F01], (instregex "^MOVIv")>;
// ASIMD move, FP immed
def : InstRW<[THX2T99Write_5Cyc_F01], (instregex "^FMOVv")>;
// ASIMD table lookup, D-form
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v8i8One")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v8i8Two")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v8i8Three")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v8i8Four")>;
// ASIMD table lookup, Q-form
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v16i8One")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v16i8Two")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v16i8Three")>;
def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^TB[LX]v16i8Four")>;
// ASIMD transpose
def : InstRW<[THX2T99Write_5Cyc_F01], (instregex "^TRN1", "^TRN2")>;
// ASIMD unzip/zip
def : InstRW<[THX2T99Write_5Cyc_F01],
(instregex "^UZP1", "^UZP2", "^ZIP1", "^ZIP2")>;
// ASIMD reciprocal estimate, D-form
// ASIMD reciprocal estimate, Q-form
def : InstRW<[THX2T99Write_5Cyc_F01],