forked from OSchip/llvm-project
[X86] Disable load unfolding for 128-bit MOVDDUP instructions since the load size is smaller than the register size so unfolding would increase the load size.
llvm-svn: 291338
This commit is contained in:
parent
a7234f1a60
commit
42b848a683
|
@ -543,7 +543,7 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
|
|||
{ X86::MOV8rr, X86::MOV8rm, 0 },
|
||||
{ X86::MOVAPDrr, X86::MOVAPDrm, TB_ALIGN_16 },
|
||||
{ X86::MOVAPSrr, X86::MOVAPSrm, TB_ALIGN_16 },
|
||||
{ X86::MOVDDUPrr, X86::MOVDDUPrm, 0 },
|
||||
{ X86::MOVDDUPrr, X86::MOVDDUPrm, TB_NO_REVERSE },
|
||||
{ X86::MOVDI2PDIrr, X86::MOVDI2PDIrm, 0 },
|
||||
{ X86::MOVDI2SSrr, X86::MOVDI2SSrm, 0 },
|
||||
{ X86::MOVDQArr, X86::MOVDQArm, TB_ALIGN_16 },
|
||||
|
@ -661,7 +661,7 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
|
|||
{ X86::VMOV64toSDrr, X86::VMOV64toSDrm, 0 },
|
||||
{ X86::VMOVAPDrr, X86::VMOVAPDrm, TB_ALIGN_16 },
|
||||
{ X86::VMOVAPSrr, X86::VMOVAPSrm, TB_ALIGN_16 },
|
||||
{ X86::VMOVDDUPrr, X86::VMOVDDUPrm, 0 },
|
||||
{ X86::VMOVDDUPrr, X86::VMOVDDUPrm, TB_NO_REVERSE },
|
||||
{ X86::VMOVDI2PDIrr, X86::VMOVDI2PDIrm, 0 },
|
||||
{ X86::VMOVDI2SSrr, X86::VMOVDI2SSrm, 0 },
|
||||
{ X86::VMOVDQArr, X86::VMOVDQArm, TB_ALIGN_16 },
|
||||
|
|
Loading…
Reference in New Issue